PJDLC05(2005) データシートの表示（PDF） - PANJIT INTERNATIONAL

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PJDLC05
(Rev.:2005)

ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE SUPPRESSOR FOR HIGH SPEED DATA LINES

PANJIT INTERNATIONAL 

PJDLC05~PJDLC24

PJDLC12

Parameter

Reverse Stand-Off Voltage

Reverse Breakdown Voltage

Reverse Leakage Current

Clamping Voltage

Clamping Voltage

Peak Pulse Current

Junction Capacitance

Symbol

VRwM

VBR

IR

VC

VC

IPP

CJ

Conditions

Minimum

I t=1mA

V = 5V,

RwM

T = 25OC

IPP = 1A

t p = 8/20 µS

IPP = 5A

t p = 8/20 µS

13.3

t p = 8/20 µS

Pin 1 to 2

VR = 0V, f = 1MHZ

Typical

Maximum

12

1

19

24

12

5

Units

V

V

µΑ

A

V

A

pF

PJDLC15

Parameter

Reverse Stand-Off Voltage

Reverse Breakdown Voltage

Reverse Leakage Current

Clamping Voltage

Clamping Voltage

Peak Pulse Current

Junction Capacitance

PJDLC24

Parameter

Reverse Stand-Off Voltage

Reverse Breakdown Voltage

Reverse Leakage Current

Clamping Voltage

Clamping Voltage

Peak Pulse Current

Junction Capacitance

REV.0-MAR.18.2005

Symbol

VRwM

VBR

IR

VC

VC

IPP

CJ

Conditions

Minimum

I t=1mA

VRwM = 5V,

T = 25OC

IPP = 1A

t p = 8/20 µS

IPP = 5A

t p = 8/20 µS

t p = 8/20 µS

Pin 1 to 2

VR = 0V, f = 1MHZ

26.7

Typical

Maximum

24

1

43

55

5

5

Units

V

V

µΑ

A

V

A

pF

Symbol

VRwM

VBR

IR

VC

VC

IPP

CJ

Conditions

Minimum

I t=1mA

VRwM = 5V,

T = 25OC

IPP = 1A

t p = 8/20 µS

IPP = 5A

t p = 8/20 µS

26.7

t p = 8/20 µS

Pin 1 to 2

VR = 0V, f = 1MHZ

Typical

Maximum

24

1

43

55

5

5

Units

V

V

µΑ

A

V

A

pF

PAGE . 2

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