R8A77301 データシートの表示（PDF） - Renesas Electronics

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R8A77301

32-Bit RISC Microcomputer

Renesas Electronics 

Preface

The SH7730 Group RISC (Reduced Instruction Set Computer) microcomputers include a Renesas

Technology-original RISC CPU as its core, and the peripheral functions required to configure a

system.

Target Users: This manual was written for users who will be using this SH7730 Group in the

design of application systems. Target users are expected to understand the

fundamentals of electrical circuits, logical circuits, and microcomputers.

Objective:

This manual was written to explain the hardware functions and electrical

characteristics of SH7730 Group to the target users. Refer to the SH-4A Extended

Functions Software Manual for a detailed description of the instruction set.

Notes on reading this manual:

• Product names

The following products are covered in this manual.

Product Classifications and Abbreviations

Basic Classification

SH7730

Product Code

R8A77301

• In order to understand the overall functions of the chip

Read the manual according to the contents. This manual can be roughly categorized into parts

on the CPU, system control functions, peripheral functions and electrical characteristics.

• In order to understand the details of the CPU's functions

Read the SH-4A Extended Functions Software Manual.

Rules:

Register name:

The following notation is used for cases when the same or a

similar function, e.g. serial communication, is implemented

on more than one channel:

XXX_N (XXX is the register name and N is the channel

number)

Bit order:

The MSB (most significant bit) is on the left and the LSB

(least significant bit) is on the right.

Number notation: Binary is B'xxxx, hexadecimal is H'xxxx, decimal is xxxx.

Signal notation: An overbar is added to a low-active signal: xxxx

Rev. 1.00 Sep. 19, 2007 Page vi of xlviii

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