Freescale Semiconductor, Inc.
CAPACITANCE (Periodically Sampled Rather Than 100% Tested)
Parameter
Input Capacitance
I/O Capacitance
Symbol
Min
Cin
—
CI/O
—
Max
Unit
5
pF
8
pF
JUNCTION TO AMBIENT THERMAL CHARACTERISTICS
Board
1 Layer
Air (LFPM)
0
θJA (°C/W)
43
1 Layer
200
36
4 Layer
0
33
. 4 Layer
200
29
TOR, INC AC OPERATING CONDITIONS AND CHARACTERISTICS
UC (VDD = 3.3 V ±5%, TJ < 120°C, Unless Otherwise Noted)
ICOND Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V
EM Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ns
Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V
Output Load . . . . . . . . . . . . . . . . . . Figure 1 Unless Otherwise Noted
ALE S CONTROL PORT TIMINGS
SC (Voltages Referenced to VSS = 0 V, Max’s are tKHKH Dependent and Listed Values are for tKHKH = 15 ns)
EE Parameter
Symbol
Min
Max
Y FR Address Valid to SEL Low
D B DTACK Low to Address Invalid
HIVE Data Valid to Select Low
ARC DTACK Low to Data Invalid
tAVSL
0
—
tDTLAX
0
—
tDVSL
0
—
tDTLDX
0
—
Unit Notes
ns
ns
ns
ns
Output Valid to DTACK Low
tQVDTL
2
—
ns
WE Valid to Select Low
tWVSL
0
—
ns
DTACK Low to WE High
tDTLWH
0
—
ns
WE High to Output Active
tWHQX
2
—
ns
Select Low to DTACK Low
tSLDTL
10
—
ns
1
Select High to DTACK High
tSHDTH
10
—
ns
DTACK Low to IRQ Low
tDTLIL
10
—
ns
IRQ Low to IRQ High
tILIH
20
—
ns
DTACK Low to Select High
tDTLSH
0
—
ns
DTACK High to Select Low
tDTHSL
0
—
ns
Address Valid to Output Valid
tAVQV
—
8
ns
Select High to Output High Impedance
tSHQZ
—
8
ns
RESET Low to RESET High
tRLRH
2 x tKHKH
—
ns
NOTE:
1. DTACK is delayed when a write is attempted during certain operations. See Functional Description.
MOTOROLA FAST SRAM
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MCM69C433•SCM69C433
5