SMM105NNCR05 データシートの表示（PDF） - Summit Microelectronics

部品番号

コンポーネント説明

メーカー

SMM105NNCR05

Single-Channel Supply Voltage Marginer and Active DC Output Controller

Summit Microelectronics 

SMM105

Preliminary Information

I2C 2-WIRE SERIAL INTERFACE AC OPERATING CHARACTERISTICS – 100/400kHz

Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND. See Figure 4 Timing Diagram.

Symbol Description

fSCL

tLOW

tHIGH

tBUF

tSU:STA

tHD:STA

tSU:STO

tAA

SCL Clock Frequency

Clock Low Period

Clock High Period

Bus Free Time

Start Condition Setup Time

Start Condition Hold Time

Stop Condition Setup Time

Clock Edge to Data Valid

tDH

Data Output Hold Time

tR

tF

tSU:DAT

tHD:DAT

TI

SCL and SDA Rise Time

SCL and SDA Fall Time

Data In Setup Time

Data In Hold Time

Noise Filter SCL and SDA

tWR

Write Cycle Time

Note: 1/ - Guaranteed by Design.

Conditions

Before New Transmission

- Note 1/

SCL low to valid

SDA (cycle n)

SCL low (cycle n+1)

to SDA change

Note 1/

Note 1/

Noise suppression

100kHz

Min Typ Max

0

100

4.7

4.0

4.7

4.7

4.0

4.7

0.2

3.5

0.2

1000

300

250

0

100

5

400kHz

Min Typ Max

0

400

1.3

0.6

1.3

0.6

0.6

0.6

0.2

0.9

Units

KHz

µs

µs

µs

µs

µs

µs

µs

0.2

µs

1000 ns

300 ns

150

ns

0

ns

100

ns

5

ms

TIMING DIAGRAMS

tR

SCL

tSU:SDA

SDA (IN)

SDA (OUT)

tF

tHD:SDA

tAA

tH IG H

tHD:DAT

tLOW

tSU:DAT

tDH

tSU:STO

Figure 4 . Basic I2C Serial Interface Timing

tW R (For W rite O peration Only)

tBUF

Summit Microelectronics, Inc

2068 1.8 09/20/05

7

Share Link: