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ST16ST2G データシートの表示(PDF) - STMicroelectronics

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ST16ST2G Datasheet PDF : 2 Pages
1 2
ST16ST2G
DESCRIPTION
The ST16ST2G, a member of the standard
ST16SF4x device family, is a serial access micro-
controller especially designed for high volume and
cost competitive Smartcard applications where
firmware security algorithm must be implemented.
The ST16ST2G is based on 8 bit CPU core and in-
cludes on chip memories: 384 Bytes of RAM, 15 K
Bytes of USER ROM, 1.5 K Byte of SYSTEM
ROM, and up to 16352 Bytes of EEPROM. The
ST16ST2G also includes 1 KByte of T2G+ Authen-
tication Library.
Both ROM and EEPROM memories can be config-
ured into two sectors. Access rules from any mem-
ory section or sector to any other are set-up by the
User’s defined Memory Access Control Matrix
(MACM).
Reliability data related to the ST16ST2G product
manufactured using STMicroelectronics advanced
CMOS EEPROM technology confirm data reten-
tion up to 10 years and endurance up to 100,000
Erase/Write cycles.
As with all other ST16 family members, the
ST16ST2G is fully compatible with the ISO stand-
ards for Smartcard applications.
Software development (ROM code, options) can
be completed by the ST16-19HDSE development
system.
The ST16ST2G can be delivered either in unsawn
or sawn wafers, 180 or 275 micron thickness as
well as in micromodule package.
For ordering information and request for quotation
(RTQ) please contact your nearest ST sales office.
Figure 1. Block Diagram
8 BIT
CPU
RAM
384
BYTES
SYSTEM
ROM
1.5 K
BYTE
ROM
15 K BYTES
SECTORS
COMBIN.
SECT.
S
SECT. SECT.
A
B
VPP GENERATION
EEPROM
Up to 16352 BYTES
SECTORS COMBINATIVE
SECTOR
A
SECTOR
B
MEMORY ACCESS CONTROL MATRIX
CLK
SERIAL I/0's
INTERFACE
NUMBER
GENERATOR
I/O1 I/O2
INTERNAL BUS
SECURITY
LOGIC
RST
VCC
GND
SCP 102b/DS
2/2

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