QT60040 データシートの表示（PDF） - Quantum Research Group
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QT60040 Datasheet PDF : 10 Pages
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©Quantum Research Group Ltd.
Figure 1-4 QT60040 Circuit Model
Figure 1-6 Conversion to Single Electrodes
CX2A
CFINGER
CX2B
Xn CX1
CX3
DRIVE
Vref
C
S1
CHARGE
CS
+-
S3
RESET
S2
TRANSFER
QT60040
C X2A
X1
X2
X3
X4
Y
CS
C FIN GER
CX2B
1 OF 4
STATE
MACHINE
DONE START RESULT
POST
PROCESSOR
OUT OPTIONS
Figure 1-5 Circuit Switch Timings
X DRIV E Xn
capacitances, possibly by using intentional mutual capacitive
coupling of tracks on a PCB; traces from the intersections of
these capacitors are led to solid touch pads which are
implemented as metallizations on the rear of a control panel.
Touching the front of the panel has the same absorptive effect on
signal strength as an interdigitated electrode set.
The values of Cx2a and Cx2b should be consistent among all
keys to preserve signal balance, which is required for proper
operation. The surface area and geometry of this type of
electrode should be adjusted to suit the desired activation area.
Typical values of Cx2a and Cx2b range from 5pF to 10pF. The
traces leading from the junctions of these capacitors to the solid
touch pads should not see a load of more than 10pF, thus the
traces to these pads should be thin and short and not
accompanied by a ground plane or other traces.
CHARGE S1
TRANSFER S2
RESET S3
V R EF
∆ VCS
C ycle 1
Cy cle 'm '
to complete; the burst length depends on the value of Cs, the Cx
capacitances, and Cfinger. Increasing Cs increases the burst
length, increasing Cx3 decreases burst length, and increasing
Cx1 and Cx2 increase burst length. Increasing Cfinger decreases
the burst length. The value of the burst length is thus a variable
that is dependent on these capacitances; the burst length is used
to create an internal reference signal level during a calibration
cycle, and to determine the presence of touch by virtue of a
change in the burst length relative to the reference level.
Because the Cs capacitor is shared among all four channels it is
important that the four interdigitated key designs be reasonably
well matched. It is also important to keep Cx1 and Cx3 to a
minimum while maximizing the values of Cx2a and Cx2b through
good key design methods. These requirements also dictate that
the IC be placed close to the keys to achieve good sensitivity
levels; long Y traces also increase the risk of susceptibility to
interference, as well as low gain. To reduce Cx3, the Y line
should not be run close to other unrelated traces or over or near
ground planes.
1.4 INTERDIGITATED ELECTRODES
Key electrodes can be made using interdigitated sets of fingers,
serpentines, spirals or similar patterns (Figure 1-7). One element
of each key must be connected to an X line, with the other
connected to the common Y line. The pattern surface area should
be similar from key to key to preserve relative key sensitivities.
It is important to prevent substantial capacitive coupling from a
‘bare’ Y line to a finger. A transient increase in Cx3 will cause a
sudden disturbance common to all keys that can create
unintentional detections. The connecting Y trace running between
the keys should be as thin as possible, on a side of the flex circuit
or pcb away from the user panel, and where possible run closely
in parallel with a segment of a nearby X trace so as to suppress
this effect. The problem of a bare Y line can be demonstrated by
touching the Cs capacitor (which is connected to Y), which will
cause one or two random keys to activate with each touch.
In cases where it is not possible to have both the X and Y traces
on the same plane, the X traces should be run on the ‘finger’ side
of the board. In all cases where the X and Y lines run on opposite
planes, the substrate (a flex circuit, or a pcb) should be as thin as
Figure 1-7 Sample Electrode Geometries
1.3 SINGLE ELECTRODE OPERATION
An alternative mode of operation is shown in Figure 1-6.
Capacitances Cx2a and Cx2b are implemented as discrete
PARALLEL LINES
lQ
-3-
SERPENTINE
SPIRAL
QT60040 / R1.04 / 0303
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