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USB1T11A(2008) データシートの表示(PDF) - Fairchild Semiconductor

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USB1T11A
(Rev.:2008)
Fairchild
Fairchild Semiconductor Fairchild
USB1T11A Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
AC Loadings and Waveforms
VOL and VOH are the typical output voltage drops that occur with the output load. VCC never goes below 3.0V.
Figure 4. Rise and Fall Times
Figure 5. VPO, VMO/FSEO to D+/D-
Figure 6. D+/D- to RCV, VP/VM
Test Circuits and Waveforms
Figure 7. /OE to D+/D-
Figure 8. Load for VM/VP and RCV
Figure 9. Load for Enable and Disable Times
CL=50pF, Full Speed
CL=200pF, Full Speed (Minimum Timing)
CL=600pF, Full Speed (Maximum Timing)
1.5kΩ on D-(Low Speed) or D+ (Full Speed) only.
Test
D-/LS
D+/LS
D-/FS
D+/FS
S1
Close
Open
Open
Close
Figure 10. Load for D+/D-
© 1999 Fairchild Semiconductor Corporation
USB1T11A • Rev. 1.0.2
7
www.fairchildsemi.com

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