VNH3SP30 データシートの表示（PDF） - STMicroelectronics

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VNH3SP30

FULLY INTEGRATED H-BRIDGE MOTOR DRIVER

STMicroelectronics 

VNH3SP30

PIN FUNCTIONS DESCRIPTION

NAME

VCC

GNDA

GNDB

OUTA

OUTB

INA

INB

PWM

ENA/DIAGA

ENB/DIAGB

DESCRIPTION

Battery connection.

Power grounds, must always be externally connected together.

Power connections to the motor.

Voltage controlled input pins with hysteresis, CMOS compatible. These two pins control the state of

the bridge in normal operation according to the truth table (brake to VCC, Brake to GND, clockwise and

counterclockwise).

Voltage controlled input pin with hysteresis, CMOS compatible. Gates of Low-Side FETS get

modulated by the PWM signal during their ON phase allowing speed control of the motor

Open drain bidirectional logic pins. These pins must be connected to an external pull up resistor.When

externally pulled low, they disable half-bridge A or B. In case of fault detection (thermal shutdown of a

High-Side FET or excessive ON state voltage drop across a Low-Side FET), these pins are pulled low

by the device (see truth table in fault condition).

BLOCK DESCRIPTIONS

(see Electrical Block Diagram page 4)

NAME

LOGIC CONTROL

OVERVOLTAGE + UNDERVOLTAGE

HIGH SIDE CLAMP VOLTAGE

HIGH SIDE AND LOW SIDE DRIVER

LINEAR CURRENT LIMITER

OVERTEMPERATURE PROTECTION

FAULT DETECTION

DESCRIPTION

Allows the turn-on and the turn-off of the High Side and the Low Side

switches according to the truth table.

Shut-down the device outside the range [5.5V..36V] for the battery

voltage.

Protect the High-Side switches from the high voltage on the battery

line in all configuration for the motor.

Drive the gate of the concerned switch to allow a good RDS(on) for the

leg of the bridge.

In case of short circuit for the High-Side switch, limits the motor current

by reducing its electrical characteristics.

In case of short-circuit with the increase of the junction’s temperature,

shuts-down the concerned High-Side to prevent its degradation and to

protect the die.

Signalize an abnormal behavior of the switches in the half-bridge A or

B by pulling low the concerned ENx/DIAGx pin.

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