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VNH3SP30 データシートの表示(PDF) - STMicroelectronics

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VNH3SP30
ST-Microelectronics
STMicroelectronics ST-Microelectronics
VNH3SP30 Datasheet PDF : 26 Pages
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VNH3SP30
TEST MODE
The PWM pin allows to test the load connection between two half-bridges. In the test mode (Vpwm=-2V)
the internal Power Mos gate drivers are disabled. The INA or INB inputs allow to turn-on the High Side A
or B, respectively, in order to connect one side of the load at VCC voltage. The check of the voltage on
the other side of the load allow to verify the continuity of the load connection. In case of load
disconnection the DIADX/ENX pin corresponding to the faulty output is pulled down.
ELECTRICAL TRANSIENT REQUIREMENTS
ISO T/R
7637/1
Test Pulse
1
2
3a
3b
4
5
Test Level
I
-25V
+25V
-25V
+25V
-4V
+26.5V
Test Level
II
-50V
+50V
-50V
+50V
-5V
+46.5V
Test Level
III
-75V
+75V
-100V
+75V
-6V
+66.5V
Test Level
IV
-100V
+100V
-150V
+100V
-7V
+86.5V
Test Levels
Delays and Impedance
2ms, 10
0.2ms, 10
0.1µs, 50
0.1µs, 50
100ms, 0.01
400ms, 2
ISO T/R
7637/1
Test Pulse
1
2
3a
3b
4
5
Test Levels Result
I
C
C
C
C
C
C
Test Levels Result
II
C
C
C
C
C
E
Test Levels Result
III
C
C
C
C
C
E
Test Levels Result
IV
C
C
C
C
C
E
Class
C
E
Contents
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
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