WED2DL32512V40BC データシートの表示（PDF） - White Electronic Designs Corporation
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WED2DL32512V40BC Datasheet PDF : 9 Pages
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WED2DL32512V
PARTIAL TRUTH TABLE - WRITE COMMANDS
Function
BWE
BWa
BWb
BWc
BWd
Read
H
X
X
X
X
Read
L
H
H
H
H
Write Byte “a”
L
L
H
H
H
Write All Bytes
L
L
L
L
L
NOTE: Using BWE and BWa through BWd, any one or more bytes may be written.
ABSOLUTE MAXIMUM RATINGS*
Voltage on VDD Supply relative to VSS
Voltage on VDDQ Supply relative to VSS
VIN (DQx)
VIN (Inputs)
Storage Temperature (BGA)
Short Circuit Output Current
-0.5V to +4.6V
-0.5V to +4.6V
-0.5V to VDDQ +0.5V
-0.5V to VDD +0.5V
-55°C to +125°C
100 mA
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
ELECTRICAL CHARACTERISTICS
Description
Symbol
Input High (Logic 1)Voltage
VIH
Input Low (Logic 0) Voltage
VIL
Input Leakage Current
ILI
Ouptut Leakage Current
ILO
Output High Voltage
VOH
Output Low Voltage
VOL
Supply Voltage
VDD
Isolated Output Buffer SupplyVDDQ
NOTES:
1. All voltages referenced to Vss (GND).
2. MODE has an internal pull-up, and input leakage = ±10µA.
Conditions
0V ≤ VIN ≤ VDD
Output(s) disabled, 0V ≤ VIN ≤ VDD
IOH = -4.0mA
IOL = 8.0mA
3.134
Min
Max
Units
Notes
2.0
VDD +0.3
V
1
-0.3
0.8
V
1
-1.0
1.0
mA
2
-1.0
1.0
mA
2.4
—
V
1
—
0.4
V
1
3.135
3.6
V
1
3.6
V
DC CHARACTERISTICS
Description
Symbol
Conditions
Typ
200* 166 150
MHz MHz MHz
133
MHz
Power Supply
Current: Operating
IDD
Device selected; All inputs ≤ VIL or 3 VIH; Cycle time 3 tKC MIN;
VDD = MAX; Outputs open
CMOS Standby
ISB2
Device deselected; VDD = MAX; All inputs ≤ VSS + 0.2
or VDD - 0.2; All inputs static; CLK frequency = 0
TTL Standby
ISB3
Device deselected; VDD = MAX; All inputs ≤ VIL or VIH;
All inputs static; CLD frequency = 0
Clock Running
ISB4
Device deselected; VDD = MAX; All inputs ≤ VSS + 0.2
or VDD -0.2; Cycle time 3 tKC MIN
950 800 740 600
10
20
20
20
20
20
40
40
40
40
80 220 180 160 140
* Advanced Information
NOTES:
1. IDD is specified with no output current and increases with faster cycle times. IDD increases with faster cycle times and greater output loading.
2. “Device deselected” means device is in power-down mode as defined in the truth table. “Device selected” means device is active (not in power-down mode).
3. Typical values are measured at 3.3V, 25°C and 133MHz.
Units
mA
mA
mA
mA
Notes
1,2,3
2,3
2,3
2,3
Description
Control Input Capacitance
Input/Output Capacitance (DQ)
Address Capacitance
Clock Capacitance
NOTES:
1. This parameter is sampled.
BGA CAPACITANCE
Conditions
TA = 25°C; f = 1MHz
TA = 25°C; f = 1MHz
TA = 25°C; f = 1MHz
TA = 25°C; f = 1MHz
Symbol
Typ
Max
CI
3
6
CO
4
5
CA
3
5
CCK
2.5
4
Units
Notes
pF
1
pF
1
pF
1
pF
1
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
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