WM2331CDT/V データシートの表示（PDF） - Wolfson Microelectronics plc

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WM2331CDT/V

10-bit 30MSPS ADC with PGA and Clamp

Wolfson Microelectronics plc 

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WM2331

DEVICE DESCRIPTION

INTRODUCTION

The WM2331 is a high speed analogue-to-digital converter (ADC) with on-chip analogue pre-

processing and reference generation, designed for applications such as composite video digitisation,

digital copiers and and high speed data acquisition. The chip architecture consists of:

• High bandwidth sample and hold input, which can operate in differential or single-

ended mode

• Programmable gain amplifier (PGA)

• Voltage clamp for DC restoration that can take its reference from an on-chip 10-bit

DAC or an external source

• 10-bit, 30MSPS pipeline analogue-to-digital converter (ADC) core

• On-chip reference generator and reference buffer (external references can also be

used for applications where common or high precision references are required)

• Bidirectional 10-bit parallel interface to read ADC conversion data and control the

device. ADC data can be output in unsigned binary or two’s complement format. An

out-of-range output pin indicates when the input signal is outside the converter’s range

ANALOGUE SIGNAL PATH

The WM2331 analogue signal path consists of a DC clamp with a 10-bit clamp level DAC (discussed

under ‘DC Clamp’, below), a high-bandwidth sample and hold unit followed by a programmable gain

amplifier (PGA) and a fast 10-bit pipelined analogue to digital converter (ADC core).

REFTF

AIN

REFTS

REFBS

+1

SAMPLE

-1/2 AND

HOLD

-1/2

VP+

VQ+

PGA

VP-

VQ-

ADC

CORE

REFBF

Figure 6 Analogue Input Signal Flow

Figure 6 shows the signal flow through the sample and hold unit and the PGA to the ADC core,

where the process of analogue to digital conversion is performed against the ADC reference

voltages, REFTF and REFBF (their generation from internal or external reference sources is

described later).

SAMPLE AND HOLD

The analogue input voltage VIN is applied to the AIN pin, either DC coupled, AC coupled, or AC

coupled with DC restoration using the WM2331 clamp circuit.

The differential sample and hold processes VIN with respect to the voltages applied to the REFTS

and REFBS pins, and produces a differential output VP = VP+ - VP- given by:

VP = VIN −VM

where

VM

=

REFTS + REFBS

2

For single-ended input signals, VM is a constant voltage; usually the AIN mid-scale input voltage.

However, in differential mode (see ‘ADC Reference Modes’, below), REFTS and REFBS can be

connected together to operate with AIN as a complementary pair of differential inputs.

WOLFSON MICROELECTRONICS LTD

PD Rev 1.4 April 2001

9

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