X24C00S データシートの表示（PDF） - Xicor -> Intersil

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X24C00S

16 x 8 Bit Serial E2PROM

Xicor -> Intersil 

X24C00

Bus Timing

SCL

SDA IN

tSU:STA

SDA OUT

tF

tHIGH

tLOW

tHD:STA tHD:DAT

tSU:DAT

tAA

tDH

tR

tSU:STO

tBUF

3836 FHD F10

WRITE CYCLE LIMITS

Symbol

tWR(4)

Parameter

Write Cycle Time

Min.

Max.

5

Units

ms

3836 PGM T09

Write Cycle Timing

SCL

SDA

D0

tWR

START

CONDTION

X24C00

ADDRESS

3836 ILL F11.1

Note: (4) The write cycle time is the time from the initiation of a write sequence to the end of the internal erase/program cycle. During the

write cycle, the X24C00 bus interface circuits are disabled, SDA is high impedance, and the device does not respond to start

conditions.

7

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