X28C010DM データシートの表示（PDF） - Intersil

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X28C010DM

5V, Byte Alterable EEPROM

Intersil 

Write Data

Writes

No

Complete?

Yes

Save Last Data

and Address

X28C010, X28HT010

DATA Polling can effectively halve the time for writing to the

X28C010/X28HT010. The timing diagram in Figure 2

illustrates the sequence of events on the bus. The software

flow diagram in Figure 3 illustrates one method of

implementing the routine.

Read Last

Address

IO7

No

Compare?

Yes

X28C010

Ready

FIGURE 3. DATA POLLING SOFTWARE FLOW

The Toggle Bit I/O6

Last

WE Write

CE

OE

I/O6

VOH

*

VOL

HIGH Z

*

* Beginning and ending state of I/O6 will vary

FIGURE 4. TOGGLE BIT BUS SEQUENCE

X28C010

Ready

5

FN8105.1

February 12, 2007

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