11N60S5(2009) データシートの表示（PDF） - Infineon Technologies

部品番号

コンポーネント説明

メーカー

11N60S5
(Rev.:2009)

Cool MOS™ Power Transistor

Infineon Technologies 

SPP11N60S5

SPI11N60S5

Electrical Characteristics , at Tj = 25 °C, unless otherwise specified

Parameter

Symbol

Conditions

Values

Unit

min. typ. max.

Characteristics

Transconductance

gfs

Input capacitance

Ciss

Output capacitance

Coss

Reverse transfer capacitance Crss

Effective output capacitance,3) Co(er)

energy related

Effective output capacitance,4) Co(tr)

time related

VDS≥2*ID*RDS(on)max,

ID=7A

VGS=0V, VDS=25V,

f=1MHz

VGS=0V,

VDS=0V to 480V

-

6

-S

- 1460 - pF

- 610 -

-

21

-

-

45

- pF

-

85

-

Turn-on delay time

Rise time

Turn-off delay time

t d(on)

VDD=350V, VGS=0/10V,

-

tr

ID=11A, RG=6.8Ω

-

t d(off)

-

130 - ns

35

-

150 225

Fall time

tf

-

20 30

Gate Charge Characteristics

Gate to source charge

Qgs

VDD=350V, ID=11A

Gate to drain charge

Qgd

Gate charge total

Qg

VDD=350V, ID=11A,

VGS=0 to 10V

Gate plateau voltage

V(plateau) VDD=350V, ID=11A

- 10.5 - nC

-

24

-

- 41.5 54

-

8

-V

1Repetitve avalanche causes additional power losses that can be calculated asPAV=EAR*f.

2Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain

connection. PCB is vertical without blown air.

3Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.

4Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.

Rev. 2.7

Page 3

2009-11-30

Share Link: