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A6595KA データシートの表示(PDF) - Allegro MicroSystems

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A6595KA
Allegro
Allegro MicroSystems Allegro
A6595KA Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
6595
8-BIT SERIAL-INPUT,
DMOS POWER DRIVER
TERMINAL DESCRIPTIONS
Terminal No. Terminal Name Function
1
POWER GROUND Reference terminal for output voltage measurements (OUT0-3).
2
LOGIC SUPPLY (VDD) The logic supply voltage (typically 5 V).
3
SERIAL DATA IN Serial-data input to the shift-register.
4-7
OUT0-3
Current-sinking, open-drain DMOS output terminals.
8
CLEAR
When (active) low, the registers are cleared (set low).
9
OUTPUT ENABLE When (active) low, the output drivers are enabled; when high, all output
drivers are turned OFF (blanked).
10
POWER GROUND Reference terminal for output voltage measurements (OUT0-3).
11
POWER GROUND Reference terminal for output voltage measurements (OUT0-7).
12
STROBE
Data strobe input terminal; shift register data is latched on rising edge.
13
CLOCK
Clock input terminal for data shift on rising edge.
14-17
18
OUT4-7
Current-sinking, open-drain DMOS output terminals.
SERIAL DATA OUT CMOS serial-data output to the following shift register.
19
LOGIC GROUND Reference terminal for input voltage measurements.
20
POWER GROUND Reference terminal for output voltage measurements (OUT4-7).
NOTE — Grounds (terminals 1, 10, 11, 19, and 20) must be connected together externally.
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