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AD5433YRUZ-REEL7(2016) データシートの表示(PDF) - Analog Devices

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AD5433YRUZ-REEL7 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD5424/AD5433/AD5445
IOUT1 1
IOUT2 2
20 RFB
19 VREF
GND 3
DB9 4
DB8 5
DB7 6
AD5433
(Not to Scale)
18 VDD
17 R/W
16 CS
15 NC
DB6 7
14 NC
DB5 8
13 DB0 (LSB)
DB4 9
12 DB1
DB3 10
11 DB2
NC = NO CONNECT
Figure 5. AD5433 Pin Configuration (TSSOP)
Data Sheet
GND 1
DB9 2
DB8 3
DB7 4
DB6 5
AD5433
TOP VIEW
(Not to Scale)
15 R/W
14 CS
13 NC
12 NC
11 DB0
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD MUST BE CONNECTED TO AGND.
Figure 6. AD5433 Pin Configuration (LFCSP)
Table 5. AD5433 Pin Function Descriptions
Pin No.
TSSOP
LFCSP Mnemonic Description
1
19
IOUT1
DAC Current Output.
2
20
IOUT2
DAC Analog Ground. This pin must normally be tied to the analog ground of the system.
3
1
GND
Ground.
4 to 13
2 to 11 DB9 to DB0 Parallel Data Bits 9 to 0.
14, 15
12, 13 NC
Not Internally Connected.
16
14
CS
Chip Select Input. Active low. Use in conjunction with R/W to load parallel data to the input
latch or to read data from the DAC register. Rising edge of CS loads data.
17
15
R/W
Read/Write. When low, used in conjunction with CS to load parallel data. When high, use with CS
to read back contents of DAC register.
18
16
VDD
Positive Power Supply Input. These parts can be operated from a supply of 2.5 V to 5.5 V.
19
17
VREF
DAC Reference Voltage Input Terminal.
20
18
RFB
DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external amplifier
output.
Not applicable
EPAD
Exposed Pad. The exposed pad must be connected to AGND.
Rev. E | Page 8 of 28

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