ATA6660(2003) データシートの表示（PDF） - Atmel Corporation

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ATA6660
(Rev.:2003)

High-speed CAN Transceiver

Atmel Corporation 

ATA6660

Standby Mode

High-speed Receiver

TXD Input

Transmitter

Split Termination

Concept

The ATA6660 can be switched to standby mode by forcing the voltage

VRS > 0.87 ´ VCC. In standby mode the supply current will reduce dramatically, supply

current during standby mode is typical 600 µA (IVCC_stby). Transmitting data function will

not be supported, but the oppertunity will remain to receive data. A high-speed compar-

ator is listening for activities on the bus. A dominant bus signal will force the output RXD

to a low level in typical tdRXDL = 400 ns. If the RS pin is not connected, causing through a

broken connection to the controller, the ATA6660 will switch to standby mode

automatically.

In normal mode a fast receiver circuitry combined with a resistor network is able to

detect differential bus line voltages Vrec_th > 0.9 V as dominant bit, differential bus line

voltages Vrec_th < 0.5 V as recessive bit.

The wide receiver common mode range, -10 V to +10 V, combined with a symmetrical

differential receiver stage offers high immunity against electromagnetic interference. A

typical hysteresis of 70 mV is implemented. Dominant differential bus voltages forces

RXD output (Pin 4) to low level, recessive differential bus voltages to high level.

The input stage Pin 1 (TXD) is compatible for 3.3 V output levels from new controller

families. Pull-up resistance (25 kW) forces the IC to recessive mode, if TXD-Pin is not

connected. TXD low signal drives the transmitter into dominant state.

A integrated complex compensation technique allows stable data transmission up to

1 MBaud. Low level on TXD input forces bus line voltages CANH to 3.5 V, CANL to

1.5 V with a termination resistor of 60 W. In the case of a line short circuit, like CANH to

GND, CANL to VCC, integrated short current limitation circuitry allows a maximum cur-

rent of 150 mA. If junction temperature rises above typical 163°C an internal

overtemperature protection shuts down both output stages, the receive mode will stay

activated.

With a modified bus termination (see Figure 5) a reduction of emission and a higher

immunity of the bus system can be achieved. The one 120 W resistor at the bus line end

nodes is split into two resistors of equal value, i.e., two resistors of 60 W. The resistors

for the stub nodes is recommended with two resistors of 1,3 kW. (for example 8 stub

nodes and 2 bus end nodes) Notice: The bus load of all the termination resistors has to

stay within the range of 50 W to 65 W.

The common mode signal at the centre tap of the termination is connected to ground via

a capacitor of e.g., Csplit = 10 nF to 100 nF. A seperate ground lead to the ground pin of

the module connector is recommended.

3

4582B–BCD–03/03

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