CY14B256K データシートの表示（PDF） - Cypress Semiconductor
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CY14B256K Datasheet PDF : 28 Pages
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Table 1. Mode Selection
CE
WE
OE
H
X
X
L
H
L
L
L
X
L
H
L
L
H
L
A13–A0
X
X
X
0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x0FC0
0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x0C63
Mode
Not Selected
Read SRAM
Write SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile STORE
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile RECALL
IO
Output High Z
Output Data
Input Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
CY14B256K
Power
Standby
Active
Active
Active ICC2[1, 2, 3]
Active[1, 2, 3]
Notes
1. The six consecutive address locations are in the order listed. WE is HIGH during all six cycles to enable a nonvolatile cycle.
2. While there are 15 address lines on the CY14B256K, only the lower 14 lines are used to control software modes.
3. IO state depends on the state of OE. The IO table shown is based on OE Low.
Document Number: 001-06431 Rev. *H
Page 6 of 28
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