EB201 データシートの表示（PDF） - ON Semiconductor
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EB201 Datasheet PDF : 8 Pages
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EB201/D
Table 1. Current Handling Capability and Junction Temperature Comparison
Devices
HDTMOS TO–220
Max RDS(on) @ 255C (mW)
10
Max Current (Amps)
21(1)
Junction Temperature (5C)
150(2)
STD TO–220
21
15(1)
180(2)
HD DPAK on FR4
45
3.6(3)
125(4)
STD DPAK on FR4
100
2.2(3)
185(4)
HD D2PAK on FR4
10
7.1(5)
125(6)
STD D2PAK on FR4
HD D2PAK on Thermal Clad®
STD D2PAK on Thermal Clad
21
5.0(5)
185(6)
10
15.3(7)
125(8)
21
10.7(7)
185(8)
HD 8–Pin SOIC (1 of 2 Die)
64
2.2(9)
125(10)
STD 8–Pin SOIC (1 of 2 Die)
132
1.6(9)
185(10)
1. Largest die available in a TO–220, RΘJC = 1.0°C/W, RΘCA = 5.0°C/W, Tamb = 125°C, Tmax = 175°C.
2. Largest die available in a TO–220, RΘJC = 1.0°C/W, RΘCA = 5.0°C/W, Tamb = 125°C, Id = 15.5 A.
3. Largest die available in a DPAK, RΘJC = 3.12°C/W, RΘCA = 50°C/W, Tamb = 85°C, Tboard = 125°C max.
4. Largest die available in a DPAK, RΘJC = 3.12°C/W, RΘCA = 50°C/W, Tamb = 85°C, Id = 3.6 A.
5. Largest die available in a D2PAK, RΘJC = 1.0°C/W, RΘCA = 50°C/W, Tamb = 85°C, Tboard = 125°C max.
6. Largest die available in a D2PAK, RΘJC = 1.0°C/W, RΘCA = 50°C/W, Tamb = 85°C, Id = 7.1 A.
7. Largest die available in a D2PAK, RΘJC = 1.0°C/W, RΘCA = 10°C/W, Tamb = 85°C, Tboard = 125°C max.
8. Largest die available in a D2PAK, RΘJC = 1.0°C/W, RΘCA = 10°C/W, Tamb = 85°C, Id = 15.3A.
9. Largest die available in an 8–pin SOIC, RΘJC = 5.0°C/W, RΘCA = 75°C/W, Tamb = 85°C, Tboard = 125°C max.
10. Largest die available in an 8–pin SOIC, RΘJC = 5.0°C/W, RΘCA = 75°C/W, Tamb = 85°C, Id = 2.2 A.
Behavior of Intrinsic Diode
The switching characteristics of the MOSFET’s body
diode are very important in systems such as PWM (pulse
width modulated) motor controllers that use it as a
freewheeling, or commutating diode. Of particular interest
are the diode’s reverse recovery characteristics, which play
a major role in determining radiated and conducted noise as
well as switching losses.
As a minority carrier device, the body diode takes a finite
time, trr, to switch from forward conducting to reverse
blocking due to the storage of minority carrier charge, Qrr.
A typical waveform showing Qrr, trr, ta, and tb is shown in
Figure 5. Qrr, trr, ta, and tb are a function of the forward
current and the rate at which the diode is switched, or applied
di/dt. The abruptness or snappiness of diode recovery is best
described by the ratio tb/ta. A ratio of 1 is considered ideal
and values less than 0.5 are considered snappy. Another key
characteristic to note is that the diode will not support
reverse voltage until the peak reverse recovery current is
reached. It is these above mentioned characteristics that
determine commutation losses and noise.
Because the diode will not support voltage until the peak
reverse recovery current is reached, the transistor that is
turning on and diverting current from the diode (usually the
transistor in the opposite leg of a 1/2 bridge) takes the brunt
of the commutation losses. The diode incurs little power
dissipation until the relatively brief tb time. Obviously,
repeatedly forcing the diode through reverse recovery
increases transistor power dissipation. Therefore, in PWM
applications one would like a diode with short trr and low Qrr
to minimize these losses.
di/dt = 100 A/microsecond, lfm = 25 A
IDIODE
MTP75N05HD
trr
ta
tb
0
Qrr
MTP50N06E
20 ns/DIV
Figure 5. Diode Reverse Recovery Comparison
Cutting switching losses is easily accomplished by
boosting switching speeds; however, the repercussions of
this strategy must be carefully considered. Sharpening the
switching edges generates more electrical noise. The
mechanisms at work are finite irremovable parasitic
inductances and capacitances acted upon by high di/dt’s and
dv/dt’s. The diode’s negative di/dt during ta is directly
controlled by the transistor clearing the stored charge.
However, the positive di/dt during tb is more dependent on
the diode itself, the maximum reverse recovery current, and
parasitic circuit elements. The abrupt edges during tb induce
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