HM62256A データシートの表示（PDF） - Hitachi -> Renesas Electronics
部品番号
コンポーネント説明
メーカー
HM62256A Datasheet PDF : 11 Pages
| |||
HM62256A Series
Write Timing Waveform (2) (OE Low Fixed)
HM62256A Series
Address
CS
WE
Dout
Din
t
*3
AS
t WC
t CW *2
t WR*4
*6
t AW
t WP *1
t WHZ*5 *10
t OH
t OW*10
*7
*8
t DW
t DH
*9
Valid Data
Notes:
1. A write occurs during the overlap of a low CS and a low WE. A write begins at the later
transition of CS going low or WE going low. A write ends at the earlier transition of CS
going high or WE going high. tWP is measured from the beginning of write to the end of
write.
2. tCW is measured from CS going low to the end of write.
3. tAS is measured from the address valid to the beginning of write.
4. tWR is measured from the earlier of WE or CS going high to the end of write cycle.
5. During this period, I/O pins are in the output state so that the input signals of the opposite
phase to the outputs must not be applied.
6. If the CS low transition occurs simultaneously with the WE low transition or after the WE
transition, the output remain in a high impedance state.
7. Dout is the same phase of the write data of this write cycle.
8. Dout is the read data of next address.
9. If CS is low during this period, I/O pins are in the output state. Therefore, the input signals
of the opposite phase to the output must not be applied to them.
10. This parameter is sampled and not 100% tested.
11. tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit
conditions and are not referenced to output voltage levels.
10
Share Link: 