HM62256A データシートの表示（PDF） - Hitachi -> Renesas Electronics
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HM62256A Datasheet PDF : 11 Pages
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HM62256A Series
Read Timing Waveform (3) *3 *5 *6
CS
Dout
tACS
tCLZ *2
HM62256A Series
Valid Data
*1,*2
tCHZ
Notes: 1. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit
conditions and are not referenced to output voltage levels.
2. This parameter is sampled and not 100% tested.
3. WE is high for read cycle.
4. Device is continuously selected, CS = VIL.
5. Address Valid prior to or coincident with CS transition Low.
6. OE = VIL.
Write Cycle
HM62256A-8 HM62256A-10 HM62256A-12 HM62256A-15
—————– —————– —————– —————–
Parameter
Symbol Min Max Min Max Min Max Min Max Unit Note
———————————————————————————————————————————————–
Write cycle time
tWC
85 — 100 — 120 — 150 — ns
———————————————————————————————————————————————–
Chip selection to
end of write
tCW
75 — 80 — 85 — 100 — ns 2
———————————————————————————————————————————————–
Address setup time
tAS
0
—0
—0
—0
—
ns
3
———————————————————————————————————————————————–
Address valid to
end of write
tAW
75 — 80 — 85 — 100 — ns
———————————————————————————————————————————————–
Write pulse width
tWP
55 — 60 — 70 — 90 — ns 1
———————————————————————————————————————————————–
Write recovery time tWR
0
—0
—0
—0
—
ns
4
———————————————————————————————————————————————–
WE to output in high-Z tWHZ
0
30 0
35 0
40 0
50 ns
10
———————————————————————————————————————————————–
Data to write time
tDW
40 — 40 — 50 — 60 — ns
overlap
———————————————————————————————————————————————–
Data hold from
write time
tDH
0
—0
—0
—0
—
ns
———————————————————————————————————————————————–
Output active from
tOW
5
—5
—5
—5
—
ns
10
end of write
———————————————————————————————————————————————–
Output disable to
output in high-Z
tOHZ
0
30 0
35 0
40 0
50 ns
10, 11
———————————————————————————————————————————————–
8
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