INTEL82801 データシートの表示（PDF） - Intel

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INTEL82801

Intel® 82801AA (ICH) and Intel® 82801AB (ICH0) I/O Controller Hub

Intel 

Introduction

Introduction

1

The ICH is a highly integrated multifunctional I/O Controller Hub that provides the interface to the

PCI Bus and integrates many of the functions needed in today’s PC platforms. The ICH

communicates with the host controller over a dedicated hub interface. There are two versions of the

ICH (82801AA: ICH and 82801AB: ICH0). This provides added flexibility in designing cost-

effective system solutions. These devices are pin compatible and are in 241-pin packages.

This datasheet describes the 82801AA (ICH) and 82801AB (ICH0) components. Unless otherwise

specified, all non-shaded areas describe the functionality of both components. In the non-shaded

areas, the term I/O Controller Hub (ICH) refers to both the 82801AB and 82801AA products.

Shading, as is shown here, indicates differences between the two components. In the shaded areas

ICH refers to the 82801AA and ICH0 refers to the 82801AB.

1.1

About this Manual

This datasheet is intended for Original Equipment Manufacturers and BIOS vendors creating ICH-

based products. The datasheet assumes a working knowledge of the vocabulary and principles of

USB, IDE, AC’97, SMBus, PCI, ACPI and LPC. Although some details of these features are

described within this datasheet, refer to the individual industry specifications listed in Table 1-1 for

additional details.

Table 1-1. Industry Specifications

Specification

LPC

AC’97

SMBus

PCI

USB

ACPI

Location

http://developer.intel.com/design/pcisets/lpc/

http://developer.intel.com/pc-supp/platform/ac97/

http://www.sbs-forum.org/specs.htm

http://pcisig.com/specs.htm

http://www.teleport.com/~usb/docs.htm

http://www.teleport.com/~acpi/

Chapter 1. Introduction

Chapter 1 introduces the ICH and provides information on datasheet organization.

Chapter 2. Signal Description

Chapter 2 provides a detailed description of each ICH signal. Signals are arranged according to

interface and details are provided as to the drive characteristics (Input/Output, Open Drain, etc.) of

the signals.

Chapter 3. ICH Power Planes and Pin States

Chapter 3 provides a complete list of signals, their associated power well, their logic level in each

suspend state, and their logic level before and after reset.

Chapter 4. ICH and System Clock Domains

Chapter 4 provides a list of each clock domain associated with the ICH in an ICH-based system.

82801AA and 82801AB Datasheet

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