KAC-1310 データシートの表示（PDF） - Unspecified

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KAC-1310

1280 (H) x 1024 (V) SXGA CMOS Image Sensor

Unspecified 

IMAGE SENSOR SOLUTIONS

IMAGE SENSOR SOLUTIONS

CFRS Video Encoded Data Stream

The Encoded Sync Control Register (65h ) (Table

51 on page 69) allows the user to select how the

output pixel data stream in CFRS mode is

encoded/formatted. In default mode, internally

generated signals SOF, VCLK, HCLK etc. drive

the integration and readout of the pixel data

frames, but only the valid pixel data is readout of

the sensor. When a “1” is written to bit 5, it causes

the output pixel data to be encoded with four (4)

10-bit pixel codes at the beginning of each line for

SOF, VCLK and End Of Frame (EOF) signals.

Operation in this mode will allow a camera system

to capture streaming video and re-construct the

frame afterwards when the SOF, VCLK, and

HCLK signals are no longer available. The Video

Encoded Signal Definitions, (Table 2), defines the

four (4) 10-bit pixel code data that represents the

SOF, VCLK, and EOF signals.

Signal

SOF

VCLK

Description Data

Start of Row [3FF][3FF][3FF][3FF]

readout (i.e.

Readout of Row Note: 3FFh = 1023d

1)

000h = 0d

Start of Row

readout of

Rows 2+

[3FF][3FF][000][000]

EOF

Readout of last [000][000][000][000]

Row complete

Table 2. Video Encoded Signal Definitions

that can be found in register 42h, Table 29 on page

53.

The TRIGGER signal can be generated internally

by the sensor or be driven via Pin #46 of the

sensor. To set whether the signal is generated

internally or externally, along with other setting of

this signal, refer to TRIGGER and STROBE

Control register (42h), Table 29 on page 53.

Window of Interest (WOI) Control

The pixel data to be read out of the device is

defined as a ‘Window of Interest’ (WOI). The

window of interest can be defined anywhere on

the pixel array at any size. The user provides the

upper-left pixel location and the size in both rows

and columns to define the WOI. The WOI is

defined using the WOI Pointer, WOI Depth, and

WOI Width registers, (Table 30 on page 58

through Table 37 on page 60). Please refer to

Figure 7 for a pictorial representation of the WOI

within the active pixel array. Any pixels not

included in the WOI will be skipped over and never

readout (note: the minimum valid values are 2 for

the WOI row pointer (wrp), and 0 for the WOI

column pointer (wcp)). The first pixel readout will

always be the first pixel of the WOI.

0

1295

0

ACTIVE PIXEL ARRAY

Single Frame Rolling Shutter capture

mode (SFRS)

In this mode of capture, the start of integration is

triggered by the TRIGGER signal. Similar to the

CFRS capture mode, readout of each row follows

the integration of that row. The imager can be

placed in SFRS capture mode using register 40h

(see Table 27 on page 55). In this mode the

imager will remain idle until the TRIGGER pin is

pulled high. The imager then begins integration

followed by image readout. If the TRIGGER input

is still high when the SFRS Frame is finished

reading out, then a second Frame is started.

Detailed timing can be found in Figure 24 on page

34. There are additional controls for SFRS mode

WOI Pointer (wcp,wrp)

Window of Interest (WOI)

1047

WOI Column Depth (wcd)

Figure 7: WOI Definition

Sub-Sampling Control (Resolution)

The WOI can be sub-sampled in either

monochrome or color pixel space in both the

horizontal and vertical direction independently.

12

KAC-1310 Rev 4 • www.kodak.com/go/imagers 585-722-4385 Email: imagers@kodak.com

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