M52342FP データシートの表示（PDF） - Renesas Electronics

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M52342FP

PLL-Split VIF/SIF IC

Renesas Electronics 

M52342FP

Item

Te

st

Ci

Sym rc Test

bol uit Point

SIF input RINS 2 TP7

resistance

SIF input CINS 2 TP7

capacitanc

e

Control section

QIF

control

CQIF

1 TP7

Input

Point

Input

SG

(VCC = 5 V, Ta = 25°C, unless otherwise noted)

Test Conditions

Limits

External

Switches set to

Power Supply

position 1

unless

Min. Typ. Max. Unit V7 V8 V12

otherwise

indicated

— 1.5 — kΩ

—

4

— pF

— 0.7 1.0 V Va

ria

bl

e

SW7 = 2

Pin 14 Voltage Control

0 to 2.3

2.7 to 5.0

Pin 14 Voltage (V)

0 to 0.6

1.0 to 2.3

2.7 to 4.0

4.4 to 5.0

AF

PAL

NTSC

AFT

NORMAL

DEFEAT

NORMAL

DEFEAT

Electrical Characteristics Test Method

Video S/N

Input SG2 into VIF IN and measure the video out (Pin 22) noise in r.m.s at TP22B through a 5 MHz (–3 dB) L.P.F.

S/N = 20 log

0.7 • Vo det

NOISE

(dB)

BW Video Band Width

1. Measure the 1MHz component level of EQ output TP22A with a spectrum analyzer when SG3 (f2 = 57.75 MHz) is

input into VIF IN. At that time, measure the voltage at TP10 with SW10, set to position 2, and then fix V10 at that

voltage.

2. Reduce f2 and measure the value of (f2 − f0) when the (f2 − f0) component level reaches −3 dB from the 1 MHz

component level as shown below.

TP18

–3 dB

1 MHz

Rev.2.00 Jun 14, 2006 page 6 of 18

(f2 – f0)

BW

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