M69AR048B データシートの表示（PDF） - STMicroelectronics

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M69AR048B

32 Mbit (2Mb x16) 1.8V Asynchronous PSRAM

STMicroelectronics 

M69AR048B

Figure 19. Chip Enable Controlled, Read and Write Mode AC Waveforms

A0-A20

E1

W

tEHAX

tEHEL

tELAX

WRITE ADDRESS

tAVEL

tEHAX

tELEH

tEHEL

tELAX(read)

READ ADDRESS

tAVEL tEHAX(read)

(read)

tELQV

UB, LB

G

DQ0-DQ15

tGHEL

tEHQZ

tEHQX

READ DATA

OUTPUT

tDVEH

tEHDZ

WRITE DATA

INPUT

tELQX

tEHQX

Note: Write address is valid from either E1 or W of last falling edge.

ai09808

Figure 20. Chip Enable, Write Enable, Output Enable Controlled, Read/Write AC Waveforms

A0-A20

E1

W

tEHAX

tEHEL

tELAX

WRITE ADDRESS

tAVEL

tWHAX

tWLWH

tEHEL

tELAX(read)

READ ADDRESS

tAVEL tEHAX(read)

(read)

tELQV

UB, LB

G

DQ0-DQ15

tEHQZ

tEHQX

READ DATA

OUTPUT

tGHEL

tGLQV

tGLQX

tDVWH

tWHDZ

WRITE DATA

INPUT

Note: G can be Low fixed in write operation under E1 control read-write-read operation.

tGHQX

READ DATA

OUTPUT

ai09809

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