M69KB096AA データシートの表示（PDF） - STMicroelectronics

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M69KB096AA

64 Mbit (4M x16) 1.8V Supply, 80MHz Clock Rate, Burst PSRAM

STMicroelectronics 

M69KB096AA

Figure 3. Block Diagram

A21-A0

Address Decode

Logic

Refresh Configuration

Register (RCR)

E

W

G

K

L

CR

WAIT

LB

UB

Control

Logic

Bus Configuration

Register (BCR)

Note: Functional block diagram illustrates simplified device operation.

4,096K x 16

MEMORY

ARRAY

DQ7-DQ0

I/O

Buffers

DQ15-DQ7

AI08721c

6/48

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