MAX5820 データシートの表示（PDF） - Maxim Integrated

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MAX5820

Dual, 8-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC

Maxim Integrated 

Dual, 8-Bit, Low-Power, 2-Wire, Serial

Voltage-Output DAC

Table 1. Power-Down Command Bits

POWER-DOWN

COMMAND BITS

PD1

PD0

0

0

0

1

MODE/FUNCTION

Power-up device. DAC output

restored to previous value.

Power-down mode 0. Power down

device with output floating.

Power-down mode 1. Power down

1

0

device with output terminated with

1kΩ to GND.

Power-down mode 2. Power down

1

1

device with output terminated with

100kΩ to GND.

The MAX5820 SDA and SCL drivers are open-drain out-

puts, requiring a pullup resistor to generate a logic high

voltage (see the Typical Operating Circuit). Series

resistors RS are optional. These series resistors protect

the input stages of the MAX5820 from high-voltage

spikes on the bus lines, and minimize crosstalk and

undershoot of the bus signals.

Bit Transfer

One data bit is transferred during each SCL clock

cycle. The data on SDA must remain stable during the

high period of the SCL clock pulse. Changes in SDA

while SCL is high are control signals (see the START

and STOP Conditions section). Both SDA and SCL idle

high when the I2C bus is not busy.

START and STOP Conditions

When the serial interface is inactive, SDA and SCL idle

high. A master device initiates communication by issu-

ing a START condition. A START condition is a high-to-

low transition on SDA with SCL high. A STOP condition

is a low-to-high transition on SDA, while SCL is high

(Figure 2). A START condition from the master signals

the beginning of a transmission to the MAX5820. The

master terminates transmission by issuing a not

acknowledge followed by a STOP condition (see the

Acknowledge Bit (ACK) section). The STOP condition

frees the bus. If a repeated START condition (Sr) is

generated instead of a STOP condition, the bus

remains active. When a STOP condition or incorrect

address is detected, the MAX5820 internally discon-

nects SCL from the serial interface until the next START

condition, minimizing digital noise and feedthrough.

Early STOP Conditions

The MAX5820 recognizes a STOP condition at any

point during transmission except if a STOP condition

occurs in the same high pulse as a START condition

(Figure 3). This condition is not a legal I2C format; at

least one clock pulse must separate any START and

STOP conditions.

Repeated START Conditions

A repeated START (Sr) condition may indicate a

change of data direction on the bus. Such a change

occurs when a command word is required to initiate a

read operation. Sr may also be used when the bus

master is writing to several I2C devices and does not

want to relinquish control of the bus. The MAX5820 seri-

al interface supports continuous write operations with or

without an Sr condition separating them. Continuous

read operations require Sr conditions because of the

change in direction of data flow.

SDA

SCL

tHD, STA

tSU, DAT

tLOW

tHIGH

tR

tF

START CONDITION

tHD, DAT

Figure 1. 2-Wire Serial-Interface Timing Diagram

tSU, STA

tHD, STA

REPEATED START CONDITION

tBUF

tSP

tSU, STO

STOP

CONDITION

START

CONDITION

8 _______________________________________________________________________________________

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