MN838850 データシートの表示（PDF） - Panasonic Corporation

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MN838850

Source Driver for LCD Panel Drive

Panasonic Corporation 

Color TFT LCD Driver

MN838850

s Functional Description (continued)

• Dot inversion drive

Since dot inversion drive is used, the analog output voltages with respect to the opposite electrode voltage differ in polarity

for each of the odd and even numbered output pins. This output voltage polarity is controlled by POL. The table below

lists the correspondence between the POL polarity setting, the analog output polarity and the VREF used.

POL

Y2n-1

Y2n

"L"

Positivepolarity Negativepolarity

VREF9 to 5 VREF4 to 0

"H"

Negativepolarity Positivepolarity

VREF4 to 0 VREF9 to 5

The POL switching timing is presented below.

POL should be switched during the period when A is low, after the last data has been input, and before the next start

signal has been input. The POL signal level is acquired by the device internally on the falling edge of the A signal. The

output polarity is determined by the acquired signal level.

A

POL

Y2n-1

Y2n

(n=1 to 192) One horizontal period

Negative

polarity

Positive

polarity

Positive

polarity

Negative

polarity

POL Switching Timing

Negative

polarity

Positive

polarity

Opposite electrode

voltages

A

Start Signal

Dxx

POL

First data

First data

Last data

Last data

One horizontal period

Details of the POL Switching Timing

7

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