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VRS700 データシートの表示(PDF) - Unspecified

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VRS700 Datasheet PDF : 45 Pages
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VRS700
VERSA
Datasheet Rev 1.3
Expanded RAM Access Using the MOVX @DPTR
Instruction (0000-0EFF, Bank4-Bank63)
The 3840 bytes of the expanded RAM data memory
occupy addresses 0000h to 0EFFh mapped on the
“external” memory bus.
These bytes can be accessed using the MOVX
instruction.
Note that in the case of indirect addressing using the
MOVX @DPTR instruction, if the address exceeds
0EFFh, the VRS700 will generate the external memory
control signal automatically.
Internal RAM Access using MOVX @Rn
instruction and the IRAM Control Register
The 3840 bytes of expanded RAM of the VRS700 can
also be accessed using the MOVX @Rn instruction
(where n = 0,1). Since this instruction can only address
256 bytes of data, it must be used in conjunction with
the internal RAM RCON register that serves to select
which part of the expanded RAM will be targeted by the
instruction.
TABLE 6: INTERNAL RAM CONTROL REGISTER (RCON) - SFR 85H
7 6 54
3
2
1
Unused
RAMS3 RAMS2 RAMS1
0
RAMS0
Bit Mnemonic Description
7 Unused
-
6 Unused
-
5 Unused
-
4 Unused
-
3 RAMS3
See Table 8 for details
2 RAMS2
See Table 8 for details
1 RAMS1
See Table 8 for details
0 RAMS0
See Table 8 for details
The value of the RAMS0, RAMS1, RAMS2, RAMS3
bits define the page of the expanded RAM that will be
accessed by the MOVX @Rn instruction.
The default setting of the RAMS0, RAMS1, RAMS2
and RAMS3 bits is 0000 (page 0). Each page has 256
bytes.
TABLE 7: MAPPING OF EXPANDED RAM PAGE ACCESS
RAMS3 RAMS2 RAMS1 RAMS0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
MOVX@Ri I=0, 1 mapping to
expanded RAM address
0000h-00FFh
0100h-01FFh
0200h-02FFh
0300h-03FFh
0400h-04FFh
0500h-05FFh
0600h-06FFh
0700h-07FFh
0800h-08FFh
0900h-09FFh
0A00h-0AFFh
0B00h-0BFFh
0C00h-0CFFh
0D00h-0DFFh
0E00h-0EFFh
1134 Ste Catherine Street West, Suite 900, Montreal, Quebec, Canada H3B 1H4 Tel: (514) 871-2447 http://www.goalsemi.com
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