AD5372 データシートの表示（PDF） - Analog Devices

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AD5372

32-Channel, 16-/14-Bit, Serial Input, Voltage Output DAC

Analog Devices 

Pin No.

56

59

63

64

AD5372/AD5373

Mnemonic

SDO

AGND

LDAC

CLR

Description

Serial Data Output. CMOS output. SDO can be used for readback. Data is clocked out on SDO

on the rising edge of SCLK and is valid on the falling edge of SCLK.

Ground for All Analog Circuitry. The AGND pin should be connected to the AGND plane.

Load DAC Logic Input (Active Low). See the BUSY and LDAC Functions section for more

information.

Asynchronous Clear Input (Level Sensitive, Active Low). See the Clear Function section for

more information.

Rev. C | Page 11 of 28

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