PIC32MZ1024ECG100 データシートの表示（PDF） - Microchip Technology
部品番号
コンポーネント説明
メーカー
PIC32MZ1024ECG100
Microchip Technology
PIC32MZ1024ECG100 Datasheet PDF : 650 Pages
| |||
PIC32MZ Embedded
Connectivity (EC) Family
32-bit MCUs (up to 2 MB Live-Update Flash and 512 KB SRAM) with
Audio and Graphics Interfaces, HS USB, Ethernet, and Advanced Analog
Operating Conditions
• 2.2V to 3.6V, -40ºC to +85ºC, DC to 200 MHz
• 2.2V to 3.6V, -40ºC to +125ºC (Planned)
Core: 200 MHz (up to 330 DMIPS) microAptiv™
• 16 KB I-Cache, 4 KB D-Cache
• MMU for optimum embedded OS execution
• microMIPS™ mode for up to 35% smaller code size
• DSP-enhanced core:
- Four 64-bit accumulators
- Single-cycle MAC, saturating and fractional math
• Code-efficient (C and Assembly) architecture
Clock Management
• 0.9% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timers (WDT) and Deadman
Timer (DMT)
• Fast wake-up and start-up
Power Management
• Low-power modes (Sleep and Idle)
• Integrated Power-on Reset and Brown-out Reset
Memory Interfaces
• 50 MHz External Bus Interface (EBI)
• 50 MHz Serial Quad Interface (SQI)
Audio and Graphics Interfaces
• Graphics interfaces: EBI or PMP
• Audio data communication: I2S, LJ, and RJ
• Audio control interfaces: SPI and I2C™
• Audio master clock: Fractional clock frequencies with USB
synchronization
High-Speed (HS) Communication Interfaces
(with Dedicated DMA)
• USB 2.0-compliant Hi-Speed On-The-Go (OTG) controller
• 10/100 Mbps Ethernet MAC with MII and RMII interface
Security Features
• Crypto Engine with a RNG for data encryption/decryption
and authentication (AES, 3DES, SHA, MD5, and HMAC)
• Advanced memory protection:
- Peripheral and memory region access control
Direct Memory Access (DMA)
• Eight channels with automatic data size detection
• Programmable Cyclic Redundancy Check (CRC)
Advanced Analog Features
• 12-bit ADC module:
- 28 Msps with six Sample and Hold (S&H) circuits
- Up to 48 analog inputs
• Flexible and independent ADC trigger sources
• Two comparators with 32 programmable voltage references
• Temperature sensor with ±2ºC accuracy
Communication Interfaces
• Two CAN modules (with dedicated DMA channels):
- 2.0B Active with DeviceNet™ addressing support
• Six UART modules (25 Mbps):
- Supports LIN 1.2 and IrDA® protocols
• Six 4-wire SPI modules (50 Mbps)
• SQI configurable as an additional SPI module (50 MHz)
• Five I2C modules (up to 1 Mbaud) with SMBus support
• Parallel Master Port (PMP)
• Peripheral Pin Select (PPS) to enable function remap
Timers/Output Compare/Input Capture
• Nine 16-bit or up to four 32-bit timers/counters
• Nine Output Compare (OC) modules
• Nine Input Capture (IC) modules
• PPS to enable function remap
• Real-Time Clock and Calendar (RTCC) module
Input/Output
• 5V-tolerant pins with up to 32 mA source/sink
• Selectable open drain, pull-ups, and pull-downs
• External interrupts on all I/O pins
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) planned
• Class B Safety Library, IEC 60730
• Back-up internal oscillator
Debugger Development Support
• In-circuit and in-application programming
• 4-wire MIPS® Enhanced JTAG interface
• Unlimited software and 12 complex breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
• Non-intrusive hardware-based instruction trace
Software and Tools Support
• C/C++ compiler with native DSP/fractional support
• MPLAB® Harmony Integrated Software Framework
• TCP/IP, USB, Graphics, and mTouch™ middleware
• MFi, Android™, and Bluetooth® audio frameworks
• FreeRTOS™, OpenRTOS®, µC/OS™, and other popular
RTOS kernels
Packages
Type
QFN
TQFP
Pin Count
64
64
100
I/O Pins (up to)
53
53
78
Contact/Lead Pitch
0.50
0.50
0.40
0.50
Dimensions
9x9x0.9
10x10x1
12x12x1
14x14x1
Note: All dimensions are in millimeters (mm) unless otherwise specified.
144
120
0.40
16x16x1
VTLA
124
98
0.50
9x9x0.9
LQFP
144
120
0.50
20x20x1.40
2013 Microchip Technology Inc.
Preliminary
DS60001191B-page 1
Share Link: