SC14480A2M6XXXXVE データシートの表示（PDF） - Unspecified

部品番号

コンポーネント説明

メーカー

SC14480A2M6XXXXVE

1.8V Single Chip for DECT

Unspecified 

31.7 BOOT INTERNAL FLASH . . . . . . . . . . . . . . 125

31.8 BOOT INTERNAL ROM . . . . . . . . . . . . . . . 125

32.0 Memories. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

32.1 BOOT ROM . . . . . . . . . . . . . . . . . . . . . . . . . 128

32.2 INTERNAL NON-SHARED RAM . . . . . . . . 128

32.3 INTERNAL SHARED RAM . . . . . . . . . . . . . 128

32.4 DIP SEQUENCER RAM . . . . . . . . . . . . . . . 128

32.5 PROGRAM FLASH . . . . . . . . . . . . . . . . . . . 128

32.5.1 Information blocks 1,2,3. . . . . . . . . . . 130

32.6 PROGRAM ROM . . . . . . . . . . . . . . . . . . . . 130

32.7 MIGRATION FROM PROGRAM FLASH TO

PROGRAM ROM . . . . . . . . . . . . . . . . . . . . . 130

33.0 Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

33.1 MEMORY MAP OVERVIEW . . . . . . . . . . . . 131

33.2 GEN2DSP /CR16CPLUS CROSS REFERENCE

ROM TABLES . . . . . . . . . . . . . . . . . . . . . . . . 133

33.3 GEN2DSP /CR16CPLUS CROSS REFERENCE

REGISTER MAP . . . . . . . . . . . . . . . . . . . . . . 133

l 33.4 CR16CPLUS MEMORY MAP DETAILED. . 135

tia 33.5 RECOMMENDED SETTINGS FOR RF

APPLICATION REGISTERS. . . . . . . . . . . . . 145

33.6 RF TEST REGISTER VALUES . . . . . . . . . . 146

n 34.0 Registers description. . . . . . . . . . . . . . . . . . . . 148

e 35.0 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . 218

fid 35.1 ELECTRICAL CHARACTERISTICS . . . . . . 219

35.2 ANALOG FRONTEND SPECIFICATIONS . 232

n 35.3 CODEC SPECIFICATIONS . . . . . . . . . . . . 239

35.4 RADIO RECEIVER SPECIFICATION . . . . . 243

o 35.5 RADIO TRANSMITTER SPECIFICATION . 244

C 35.6 RADIO SYNTHESIZER SPECIFICATION . 245

36.0 Timing diagrams. . . . . . . . . . . . . . . . . . . . . . . . 246

36.1 MICROWIRE TIMING DIAGRAMS . . . . . . . 248

36.2 UART IRDA TIMING DIAGRAMS . . . . . . . . 250

36.3 ACCESS BUS TIMING DIAGRAM . . . . . . . 251

36.4 PCM INTERFACE TIMING DIAGRAM . . . . 252

36.5 SPI BUS TIMING DIAGRAM . . . . . . . . . . . . 254

37.0 Package and KGD information . . . . . . . . . . . . 255

37.1 MOISTURE SENSITIVITY LEVEL (MSL) . . 255

37.2 SOLDERING INFORMATION . . . . . . . . . . . 255

37.3 KGD STORAGE INFORMATION . . . . . . . . 255

37.4 PACKAGE OUTLINES . . . . . . . . . . . . . . . . 255

© 2008-2009 SiTel Semiconductor

3

Version: January 21, 2009 v1.0

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