SC14480 データシートの表示（PDF） - Unspecified
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SC14480 Datasheet PDF : 259 Pages
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Table 1: Pin Description
PIN NAME
TYPE
Drive
(mA)
Reset
state
(Note 2)
DESCRIPTION
Ports
P0[7]
P0[6]
P0[5]
P0[4]
P0[3]
P0[2]
P0[1]
P0[0]
DIO-BP
DIO-BP
DIO-BP
DIO-BP
DIO-BP
DIO-BP
DIO-BP
DIO-BP
8
I-PU INPUT/OUTPUT with selectable pull up/down resistor. Pull-up
8
I-PU enabled during and after reset. General purpose I/O port bit or
8
I-PU alternate function nodes.
8
I-PU DIO_BP have backdrive protection (Note 3)
8
I-PU
8
I-PU
8
I-PU (10k)
8
I-PU
P1[5]
P1[4]
P1[3]
P1[2]
P1[1]
P1[0]
P2[7]
P2[6]
P2[5]
P2[4]
P2[3]
P2[2]
P2[1]
P2[0]
P3[7]
P3[6]
P3[5]
P3[4]
P3[3]
P3[1]
P3[0]
DIO
DIO
DIO
DIO
DIO
A4S
DIO-BP
DIO
DIO-BP
DIO-BP
DIO-BP
DIO-BP
DIO-BP
DIO-BP
A2S
A2S
A2S
A2S
A4S
DO
DO
8
O-1
INPUT/OUTPUT with selectable pull up/down resistor. Pull-up
1,2
I-PD enabled during and after reset. General purpose I/O port bit or
1,2
I-PD alternate function nodes.
2
I-PU P1[5] Used for supply of external EEPROM (See VDDE)
2
I-PU P1[3], P1[4] 1mA mode used to bias external NPN transistor
2
I-PU without external resistor.
8
I-PU INPUT/OUTPUT with selectable pull up/down resistor. Pull-up
2
I-PU enabled during and after reset. General purpose I/O port bit or
l 8
I-PU alternate function nodes.
8
I-PU DIO_BP have backdrive protection (Note 3)
tia 8
I-PU
8
I-PU
8
I
n 8
I
4
I
INPUT/OUTPUT with selectable pull up/down resistor. Pull-up/
e 4
I
down disabled during and after reset. General purpose I/O port
4
I
bit or alternate function nodes.
fid 8
I
8
I
n 500
O-0
See also PAOUTp/PAOUTn description
500 (5k fixed
opull down)
O-0
C (5k fixed
pull down)
Port 4, 5 (Only on KGD and 100 pins device, not tested unless commercially discussed)
P5[7-0]
P4[7-0]
DIO-BP
8
DIO-BP
8
I-PU
I-PU
INPUT/OUTPUT port with selectable pull up/down resistor. Pull-
up enabled during and after reset.
DIO_BP have backdrive protection (Note 3)
Power management
PON /
P1[6]
A3
-
I-PD INPUT. Power on, Switchies on the device if Voltage >
(fixed 270k Vih_a3pad. May be directly connected to VBAT. If used as port
pulldown) pin, the maximum input switching speed of this pin is 100 kHz.
CHARGE /
A3
-
I-PD INPUT. Charger connected indication and supply voltage for
P1[7]
(fixed 270k power management. Switches on the device if voltage >
pulldown) Vih_a3pad. Must be connected to charger via resistor
R>(Vcharger_max-3V)/10 mA (round to next largest value in
range). An internal 10 ms hold circuit keeps device on if the
charger voltage ripple momentarily drop below Vil_charge. This
eliminates the use of expensive ripple filter. If used as port pin,
the maximum input switching speed of this pin is 100 kHz.
© 2008-2009 SiTel Semiconductor
6
Version: January 21, 2009 v1.0
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