AM29LV640DU120RPCFN(2007) データシートの表示（PDF） - Advanced Micro Devices

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AM29LV640DU120RPCFN
(Rev.:2007)

64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO™ Control

Advanced Micro Devices 

DATA SHEET

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5

Special Handling Instructions for FBGA/fBGA Packages ......... 7

Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10

Table 1. Device Bus Operations .....................................................10

VersatileIO™ (VIO) Control ..................................................... 10

Requirements for Reading Array Data ................................... 10

Writing Commands/Command Sequences ............................ 11

Accelerated Program Operation ......................................................11

Autoselect Functions .......................................................................11

Standby Mode ........................................................................ 11

Automatic Sleep Mode ........................................................... 11

RESET#: Hardware Reset Pin ............................................... 11

Output Disable Mode .............................................................. 12

Table 2. Sector Address Table ........................................................12

Autoselect Mode ..................................................................... 16

Table 3. Autoselect Codes, (High Voltage Method) .......................16

Sector Group Protection and Unprotection ............................. 17

Table 4. Sector Group Protection/Unprotection Address Table .....17

Write Protect (WP#) ................................................................ 18

Temporary Sector Group Unprotect ....................................... 18

Figure 1. Temporary Sector Group Unprotect Operation................ 18

Figure 2. In-System Sector Group Protect/Unprotect Algorithms ... 19

SecSi (Secured Silicon) Sector Flash Memory Region .......... 20

Table 5. SecSi Sector Contents ......................................................20

Hardware Data Protection ...................................................... 20

Low VCC Write Inhibit .....................................................................20

Write Pulse “Glitch” Protection ........................................................21

Logical Inhibit ..................................................................................21

Power-Up Write Inhibit ....................................................................21

Common Flash Memory Interface (CFI) . . . . . . . 21

Table 6. CFI Query Identification String .......................................... 21

System Interface String................................................................... 22

Table 8. Device Geometry Definition .............................................. 22

Table 9. Primary Vendor-Specific Extended Query ........................ 23

Command Definitions . . . . . . . . . . . . . . . . . . . . . 23

Reading Array Data ................................................................ 23

Reset Command ..................................................................... 24

Autoselect Command Sequence ............................................ 24

Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 24

Word Program Command Sequence ..................................... 24

Unlock Bypass Command Sequence ..............................................25

Figure 3. Program Operation .......................................................... 25

Chip Erase Command Sequence ........................................... 25

Sector Erase Command Sequence ........................................ 26

Erase Suspend/Erase Resume Commands ........................... 26

Figure 4. Erase Operation............................................................... 27

Command Definitions ............................................................. 28

Command Definitions...................................................................... 28

Write Operation Status . . . . . . . . . . . . . . . . . . . . . 29

DQ7: Data# Polling ................................................................. 29

Figure 5. Data# Polling Algorithm ................................................... 29

RY/BY#: Ready/Busy# ............................................................ 30

DQ6: Toggle Bit I .................................................................... 30

Figure 6. Toggle Bit Algorithm........................................................ 30

DQ2: Toggle Bit II ................................................................... 31

Reading Toggle Bits DQ6/DQ2 ............................................... 31

DQ5: Exceeded Timing Limits ................................................ 31

DQ3: Sector Erase Timer ....................................................... 31

Table 11. Write Operation Status ................................................... 32

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 33

Figure 7. Maximum Negative Overshoot Waveform ..................... 33

Figure 8. Maximum Positive Overshoot Waveform....................... 33

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 33

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 9. ICC1 Current vs. Time (Showing

Active and Automatic Sleep Currents) ........................................... 35

Figure 10. Typical ICC1 vs. Frequency ............................................ 35

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 11. Test Setup.................................................................... 36

Table 12. Test Specifications ......................................................... 36

Key to Switching Waveforms. . . . . . . . . . . . . . . . 36

Figure 12. Input Waveforms and

Measurement Levels...................................................................... 36

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 37

Read-Only Operations ........................................................... 37

Figure 13. Read Operation Timings ............................................... 37

Hardware Reset (RESET#) .................................................... 38

Figure 14. Reset Timings ............................................................... 38

Erase and Program Operations .............................................. 39

Figure 15. Program Operation Timings.......................................... 40

Figure 16. Accelerated Program Timing Diagram.......................... 40

Figure 17. Chip/Sector Erase Operation Timings .......................... 41

Figure 18. Data# Polling Timings

(During Embedded Algorithms)...................................................... 42

Figure 19. Toggle Bit Timings

(During Embedded Algorithms)...................................................... 43

Figure 20. DQ2 vs. DQ6................................................................. 43

Temporary Sector Unprotect .................................................. 44

Figure 21. Temporary Sector Group Unprotect Timing Diagram ... 44

Figure 22. Sector Group Protect and Unprotect Timing Diagram .. 45

Alternate CE# Controlled Erase and Program Operations ..... 46

Figure 23. Alternate CE# Controlled Write

(Erase/Program) Operation Timings .............................................. 47

Erase And Programming Performance . . . . . . . 48

Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 48

TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 48

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 49

SSO056—56-Pin Shrink Small Outline Package (SSOP) ...... 49

FBE063—63-Ball Fine-Pitch Ball Grid Array

(FBGA) 12 x 11 mm package ................................................. 50

LAA064—64-Ball Fortified Ball Grid Array

(FBGA) 13 x 11 mm package ................................................. 51

TS 048—48-Pin Standard TSOP ............................................ 52

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 53

January 22, 2007 22366C6

Am29LV640D/Am29LV641D

3

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