MT29F8G16AJADAHCIT データシートの表示（PDF） - Micron Technology
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MT29F8G16AJADAHCIT Datasheet PDF : 132 Pages
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Micron Confidential and Proprietary
4Gb, 8Gb, 16Gb: x8, x16 NAND Flash Memory
Asynchronous Interface Bus Operation
Asynchronous Interface Bus Operation
The bus on the device is multiplexed. Data I/O, addresses, and commands all share the
same pins. I/O[15:8] are used only for data in the x16 configuration. Addresses and
commands are always supplied on I/O[7:0].
The command sequence typically consists of a COMMAND LATCH cycle, address input
cycles, and one or more data cycles, either READ or WRITE.
Table 6: Asynchronous Interface Mode Selection
Mode1
Standby2
Command input
CE#
CLE
ALE
WE#
RE#
I/Ox
WP#
H
X
X
X
X
X
0V/VCC
L
H
L
H
X
H
Address input
L
L
H
H
X
H
Data input
L
L
L
H
X
H
Data output
L
L
L
H
X
X
Write protect
X
X
X
X
X
X
L
Notes:
1. Mode selection settings for this table: H = Logic level HIGH; L = Logic level LOW; X = VIH
or VIL.
2. WP# should be biased to CMOS LOW or HIGH for standby.
Asynchronous Enable/Standby
When the device is not performing an operation, the CE# pin is typically driven HIGH
and the device enters standby mode. The memory will enter standby if CE# goes HIGH
while data is being transferred and the device is not busy. This helps reduce power con-
sumption.
The CE# “Don’t Care” operation enables the NAND Flash to reside on the same asyn-
chronous memory bus as other Flash or SRAM devices. Other devices on the memory
bus can then be accessed while the NAND Flash is busy with internal operations. This
capability is important for designs that require multiple NAND Flash devices on the
same bus.
A HIGH CLE signal indicates that a command cycle is taking place. A HIGH ALE signal
signifies that an ADDRESS INPUT cycle is occurring.
Asynchronous Commands
An asynchronous command is written from I/O[7:0] to the command register on the ris-
ing edge of WE# when CE# is LOW, ALE is LOW, CLE is HIGH, and RE# is HIGH.
Commands are typically ignored by die (LUNs) that are busy (RDY = 0); however, some
commands, including READ STATUS (70h) and READ STATUS ENHANCED (78h), are
accepted by die (LUNs) even when they are busy.
For devices with a x16 interface, I/O[15:8] must be written with zeros when a command
is issued.
PDF: 09005aef83b25735
m60a_4gb_8gb_16gb_ecc_nand.pdf - Rev. N 10/12 EN
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
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