HYB511000BJ-50 データシートの表示（PDF） - Infineon Technologies

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HYB511000BJ-50

1 M×1-Bit Dynamic RAM Low Power 1 M×1-Bit Dynamic RAM

Infineon Technologies 

HYB 511000BJ/BJL-50/-60/-70

1 M × 1-DRAM

AC Characteristics (cont’d) 4) 13)

TA = 0 to 70 ˚C; VCC = 5 V ± 10 %; tT = 5 ns

Parameter

Symbol

-50

min. max.

RAS to column address tRAD

15

25

delay time

12)

CAS to RAS precharge tCRP

5

–

time

CAS precharge time (fast tCP

page mode)

10

–

Row address

setup time

tASR

0

–

Row address

hold time

tRAH

10

–

Column address setup tASC

0

–

time

Column address hold

tCAH

15

–

time

Column address to RAS tRAL

lead time

25

–

Read command setup

tRCS

0

–

time

Read command hold

tRCH

0

–

time

8)

Read command hold time tRRH

0

–

referenced to RAS

8)

Write command hold time tWCH

10

–

Write command pulse

tWP

width

10

–

Write command to RAS tRWL

15

–

lead time

Write command to CAS tCWL

15

–

lead time

Data setup time

Data hold time

9) tDS

9) tDH

0

–

10

–

Refresh period

tREF

–

8

Refresh period for

L-version only

tREF

–

64

Limit Values

-60

min. max.

15

30

-70

min. max.

15

35

5

–

5

–

10

–

10

–

0

–

0

–

10

–

10

–

0

–

0

–

15

–

15

–

30

–

35

–

0

–

0

–

0

–

0

–

0

–

0

–

10

–

10

–

15

–

15

–

15

–

20

–

15

–

20

–

0

–

15

–

–

8

–

64

0

–

15

–

–

8

–

64

Unit

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ms

ms

Semiconductor Group

40

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