UAA2077TS データシートの表示（PDF） - Philips Electronics
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UAA2077TS Datasheet PDF : 16 Pages
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Philips Semiconductors
2 GHz image rejecting front-end
Preliminary specification
UAA2077TS
BLOCK DIAGRAM
handbook, full pagewidth
VCCLNA LNAGND GND
1
6
9
n.c.
RXON
2, 5, 8
10
×
3
RFINA
4
RFINB
LNA
×
45°
135°
IF
COMBINER
15
IFA
16
IFB
13
VCCLO
14
LOGND
135°
45°
QUADRATURE
PHASE
SHIFTER
RECEIVE SECTION
LOCAL OSCILLATOR SECTION
UAA2077TS
7
SXON
11 12
LOINB LOINA
FCA012
Fig.1 Block diagram.
PINNING
SYMBOL PIN
DESCRIPTION
VCCLNA
1 supply voltage for receive section
(LNA and IF parts)
n.c.
2 not connected
RFINA
3 RF input A (balanced)
RFINB
4 RF input B (balanced)
n.c.
5 not connected
LNAGND
6 ground for receive section (LNA and
IF parts)
SXON
7 SX mode enable input (see Table 1)
n.c.
8 not connected
GND
9 ground
RXON
10 RX mode enable input (see Table 1)
LOINB
11 LO input B (balanced)
LOINA
12 LO input A (balanced)
VCCLO
LOGND
13 supply voltage for LO section
14 ground for LO section
IFA
15 IF output A (balanced)
IFB
16 IF output B (balanced)
handbook, halfpage
VCCLNA 1
16 IFB
n.c. 2
15 IFA
RFINA 3
14 LOGND
RFINB 4
13 VCCLO
UAA2077TS
n.c. 5
12 LOINA
LNAGND 6
11 LOINB
SXON 7
10 RXON
n.c. 8
9 GND
FCA011
Fig.2 Pin configuration.
2000 Apr 17
3
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