SST31LF021(2001) データシートの表示（PDF） - Silicon Storage Technology
部品番号
コンポーネント説明
メーカー
SST31LF021 Datasheet PDF : 24 Pages
| |||
2 Mbit Flash + 1 Mbit SRAM ComboMemory
SST31LF021 / SST31LF021E
Data Sheet
internal Program or Erase operation. See Table 4 for soft-
ware command codes, Figure 12 for timing waveform and
Figure 18 for a flowchart.
Design Considerations
SST recommends a high frequency 0.1 µF ceramic capac-
itor to be placed as close as possible between VDD and
VSS, e.g., less than 1 cm away from the VDD pin of the
device. Additionally, a low frequency 4.7 µF electrolytic
capacitor from VDD to VSS should be placed within 1 cm of
the VDD pin.
FUNCTIONAL BLOCK DIAGRAM
Address Buffers
AMS - A0
BES#
BEF#
OE#
WE#
Control Logic
Address Buffers
& Latches
Note: AMS = Most Significant Address
SRAM
SuperFlash
Memory
I/O Buffers
DQ7 - DQ0
392 ILL B1.2
SST31LF021E
A11
A9
A8
A13
A14
A17
BES#
VDD
WE#
A16
A15
A12
A7
A6
A5
A4
SST31LF021
A11
1
A9
2
A8
3
A13
4
A14
5
A17
6
WE#
7
VDD
8
BES#
9
A16
10
A15
11
A12
12
A7
13
A6
14
A5
15
A4
16
Standard Pinout
Top View
Die Up
SST31LF021
32
OE#
31
A10
30
BEF#
29
DQ7
28
DQ6
27
DQ5
26
DQ4
25
DQ3
24
VSS
23
DQ2
22
DQ1
21
DQ0
20
A0
19
A1
18
A2
17
A3
392 ILL F01.3
SST31LF021E
OE#
A10
BEF#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
FIGURE 1: PIN ASSIGNMENTS FOR 32-LEAD TSOP (8MM X 14MM)
©2001 Silicon Storage Technology, Inc.
5
S71137-03-000 10/01 392
Share Link: 