CXA3541N データシートの表示（PDF） - Sony Semiconductor

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CXA3541N

2-channel Read/Write Amplifier for GMR-Ind Head Hard Disk Drive

Sony Semiconductor 

Mode Control

SLEEP

XSLP = 0

CXA3541N

READ

XSLP = 1

XIDL = 1

R/XW = H

IDLE

XSLP = 1

XIDL = 0

R/XW = X

WRITE

XSLP = 1

XIDL = 1

R/XW = L

Serial Port Timing Detail

TSL

SDEN

f (sclk)

Tsu (sden)

Tw (sclk)

Th (sden)

SCLK

Tsu (d)

Th (d)

SDATA

A1 A0 D5 D4 D3 D2 D1 D0

Serial Port Timing

After the SDEN goes high, the last eight bits are transferred into the register. The SCLK will shift the data

presented at SDATA into an internal shift register on the rising edge of each clock.

As SCLK initial condition, both of low and high signal is acceptable.

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