MC74HC51D データシートの表示（PDF） - Motorola => Freescale

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MC74HC51D

2-Wide, 2-Input/2-Wide, 3-Input AND-NOR Gates

Motorola => Freescale 

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

2-Wide, 2-Input/2-Wide,

3-Input AND-NOR Gates

High–Performance Silicon–Gate CMOS

The MC74HC51 is identical in pinout to the LS51. The device inputs are

compatible with standard CMOS outputs; with pullup resistors, they are

compatible with LSTTL outputs.

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2 to 6 V

• Low Input Current: 1 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 42 FETs or 10.5 Equivalent Gates

1

A1

12

B1

13

C1

9

D1

10

E1

11

F1

2

A2

3

B2

4

C2

5

D2

LOGIC DIAGRAM

8

Y1

Y1 = (A1•B1•C1) + (D1•E1•F1)

6

Y2

Y2 = (A2•B2) + (C2•D2)

PIN 14 = VCC

PIN 7 = GND

MC74HC51

14

1

14

1

N SUFFIX

PLASTIC PACKAGE

CASE 646–06

D SUFFIX

SOIC PACKAGE

CASE 751A–03

ORDERING INFORMATION

MC74HCXXN

MC74HCXXD

Plastic

SOIC

PIN ASSIGNMENT

A1 1

A2 2

B2 3

C2 4

D2 5

Y2 6

GND 7

14 VCC

13 C1

12 B1

11 F1

10 E1

9 D1

8 Y1

FUNCTION TABLES

Inputs

A1 B1 C1 D1 E1 F1

HHHXXX

XXXHHH

All other combinations

Output

Y1

L

L

H

Inputs

A2 B2 C2 D2

H

H

X

X

X

X

H

H

All other combinations

Output

Y2

L

L

H

10/95

© Motorola, Inc. 1995

1

REV 6

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