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24C02A データシートの表示(PDF) - Microchip Technology

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24C02A
Microchip
Microchip Technology Microchip
24C02A Datasheet PDF : 12 Pages
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24C01A/02A/04A
TABLE 1-3: AC CHARACTERISTICS
Parameter
Symbol Min.
Typ Max.
Units
Remarks
Clock frequency
FCLK
— 100
kHz
Clock high time
THIGH
4000
ns
Clock low time
TLOW
4700
ns
SDA and SCL rise time
TR
— 1000
ns
SDA and SCL fall time
TF
— 300
ns
START condition hold time
THD:STA 4000
ns
After this period the first
clock pulse is generated
START condition setup time TSU:STA 4700
ns
Only relevant for repeated
START condition
Data input hold time
THD:DAT
0
ns
Data input setup time
TSU:DAT
250
ns
Data output delay time
TAA
300
— 3500
(Note 1)
STOP condition setup time
TSU:STO 4700
ns
Bus free time
TBUF
4700
ns
Time the bus must be free
before a new transmission
can start
Input filter time constant
(SDA and SCL pins)
TI
— 100
ns
Program cycle time
TWC
.4
1
ms
Byte mode
.4N N
ms
Page mode, N=# of bytes
Endurance
1M
cycles 25°C, Vcc = 5.0V, Block
Mode (Note 2)
Note 1: As transmitter the device must provide this internal minimum delay time to bridge the undefined region (min-
imum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
2: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our BBS or website.
FIGURE 1-2: BUS TIMING DATA
TF
TR
THIGH
TLOW
SCL
TSU:STA
SDA
IN
SDA
OUT
TSP
TAA
THD:STA
THD:DAT
THD:STA
TAA
TSU:DAT
TSU:STO
TBUF
© 1996 Microchip Technology Inc.
DS11183D-page 3

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