24C02SC データシートの表示（PDF） - Microchip Technology
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24C02SC Datasheet PDF : 12 Pages
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7.4 Noise Protection
The 24C01SC/02SC employs a VCC threshold detector
circuit which disables the internal erase/write logic if the
VCC is below 1.5 volts at nominal conditions.
The SCL and SDA inputs have Schmitt trigger and filter
circuits which suppress noise spikes to assure proper
device operation even on a noisy bus.
24C01SC/02SC
FIGURE 7-1: CURRENT ADDRESS READ
S
BUS ACTIVITY
MASTER
T
A
R
T
CONTROL
BYTE
S
T
DATA n
O
P
SDA LINE
S
P
BUS ACTIVITY
A
N
C
O
K
A
C
K
FIGURE 7-2: RANDOM READ
S
BUS ACTIVITY
T
A
MASTER
R
T
CONTROL
BYTE
SDA LINE
S
BUS ACTIVITY
S
WORD
ADDRESS (n)
T
A
R
T
S
A
A
C
C
K
K
CONTROL
BYTE
A
C
K
S
T
DATA n
O
P
P
N
O
A
C
K
FIGURE 7-3: SEQUENTIAL READ
BUS ACTIVITY CONTROL
MASTER
BYTE
SDA LINE
A
BUS ACTIVITY
C
K
DATA n
A
A
A
C
C
C
K
K
K
DATA n + 1
DATA n + 2
S
T
O
P
P
N
DATA n + X O
A
C
K
© 1996 Microchip Technology Inc.
Preliminary
DS21170A-page 7
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