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24C04A データシートの表示(PDF) - Unspecified

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24C04A Datasheet PDF : 20 Pages
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24C04A, 24C08A, 24C16A
Figure 8: SCL and SDA Bus Timing
AC CHARACTERISTICS
Symbol
Parameter
fSCL
tLOW
tHIGH
tI
tAA
tBUF
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
tF
tSU.STO
tDH
WR
Endurance(1)
Clock frequency, SCL
Clock pulse width low
Clock pulse width high
Noise suppression time(1)
Clock low to data out valid
Time the bus must be free before a
new transmission can start(1)
START hold time
START set-up time
Data in hold time
Data in set-up time
Input rise time(1)
Input fall time(1)
STOP set-up time
Date out hold time
Write cycle time
25oC, Page Mode, 3.3V
1.8 V
2.5-5.0 V
Min Max Min Max
400
1000
1.3
0.4
0.6
0.4
180
120
0.3
0.9 0.2 0.55
1.3
0.5
0.6
0.25
0.6
0.25
0
0
100
100
0.3
0.3
300
100
0.6
0.25
50
50
5
5
1,000,000
Notes:
1. This Parameter is expected by characterization but are not fully screened by test.
2. AC Measurement conditions:
RL (Connects to Vcc): 1.3K
Input Pulse Voltages: 0.3Vcc to 0.7Vcc
Input and output timing reference Voltages: 0.5Vcc
Unit
kHz
µs
µs
ns
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns
ms
Write Cycles
DS3001M-page8
© 2009 Fremont Micro Devices Inc.

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