24LC025T-/ST データシートの表示（PDF） - Microchip Technology
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24LC025T-/ST Datasheet PDF : 12 Pages
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24LC024/24LC025
8.0 READ OPERATIONS
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
slave address is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read.
8.1 Current Address Read
The 24LC024/24LC025 contains an address counter
that maintains the address of the last word accessed,
internally incremented by one. Therefore, if the previ-
ous read access was to address n, the next current
address read operation would access data from
address n + 1. Upon receipt of the slave address with
the R/W bit set to one, the 24LC024/24LC025 issues an
acknowledge and transmits the eight bit data word. The
master will not acknowledge the transfer but does gen-
erate a stop condition and the 24LC024/24LC025 dis-
continues transmission (Figure 8-1).
8.2 Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24LC024/24LC025 as part of a write operation. After
the word address is sent, the master generates a start
condition following the acknowledge. This terminates
the write operation, but not before the internal address
pointer is set. Then the master issues the control byte
again but with the R/W bit set to a one. The 24LC024/
24LC025 will then issue an acknowledge and transmits
the eight bit data word. The master will not acknowl-
edge the transfer but does generate a stop condition
and the 24LC024/24LC025 discontinues transmission
(Figure 8-2). After this command, the internal address
counter will point to the address location following the
one that was just read.
8.3 Sequential Read
Sequential reads are initiated in the same way as a ran-
dom read except that after the 24LC024/24LC025
transmits the first data byte, the master issues an
acknowledge as opposed to a stop condition in a ran-
dom read. This directs the 24LC024/24LC025 to trans-
mit the next sequentially addressed 8-bit word
(Figure 8-3).
To provide sequential reads the 24LC024/24LC025
contains an internal address pointer which is incre-
mented by one at the completion of each operation.
This address pointer allows the entire memory contents
to be serially read during one operation. The internal
address pointer will automatically roll over from address
0FFh to address 000h.
FIGURE 8-1: CURRENT ADDRESS READ
S
BUS ACTIVITY
MASTER
T
A
R
T
SDA LINE
S
CONTROL
BYTE
A
BUS ACTIVITY
C
K
S
T
O
P
P
N
DATA
O
A
C
K
FIGURE 8-2: RANDOM READ
S
S
BUS ACTIVITY
MASTER
T
A
R
CONTROL
BYTE
WORD
ADDRESS (n)
T
A CONTROL
R
BYTE
S
T
O
T
T
P
S
S
P
SDA LINE
A
A
A
N
C
C
C DATA (n) O
BUS ACTIVITY
K
K
K
A
C
K
FIGURE 8-3: SEQUENTIAL READ
BUS ACTIVITY
MASTER
CONTROL
BYTE
DATA n
SDA LINE
A
C
BUS ACTIVITY
K
DATA n + 1
DATA n + 2
A
A
A
C
C
C
K
K
K
S
T
DATA n + X O
P
P
N
O
A
C
K
© 1997 Microchip Technology Inc.
Preliminary
DS21210A-page 9
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