24CO04B-IP データシートの表示（PDF） - Microchip Technology
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24CO04B-IP Datasheet PDF : 12 Pages
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24LC04B/08B
FIGURE 7-1: CURRENT ADDRESS READ
S
BUS ACTIVITY
MASTER
T
A
R
CONTROL
BYTE
T
SDA LINE
S
A
BUS ACTIVITY
C
K
DATA n
S
T
O
P
P
N
O
A
C
K
FIGURE 7-2: RANDOM READ
S
BUS ACTIVITY
MASTER
T
A
R
T
CONTROL
BYTE
WORD
ADDRESS (n)
S
T
A CONTROL
R
BYTE
T
S
T
O
DATA (n)
P
S
S
P
SDA LINE
A
A
A
N
C
C
C
O
K
K
K
BUS ACTIVITY
A
C
K
FIGURE 7-3: SEQUENTIAL READ
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
CONTROL
BYTE
A
C
K
DATA n
DATA n + 1
DATA n + 2
A
A
A
C
C
C
K
K
K
S
T
O
DATA n + X
P
P
N
O
A
C
K
8.0 PIN DESCRIPTIONS
8.1 SDA Serial Address/Data Input/Output
This is a Bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pullup
resistor to VCC (typical 10KΩ for 100 kHz, 1KΩ for 400
kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.
8.2 SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
8.3 WP
This pin must be connected to either VSS or VCC.
If tied to VSS, normal memory operation is enabled
(read/write the entire memory).
If tied to VCC, WRITE operations are inhibited. The
entire memory will be write-protected. Read operations
are not affected.
This feature allows the user to use the 24LC04B/08B as
a serial ROM when WP is enabled (tied to VCC).
8.4 A0, A1, A2
These pins are not used by the 24LC04B/08B. They
may be left floating or tied to either VSS or VCC.
© 1996 Microchip Technology Inc.
DS21051E-page 7
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