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25LC010A データシートの表示(PDF) - Microchip Technology

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25LC010A Datasheet PDF : 24 Pages
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25LCXXXA
3.6 Write Status Register Instruction
(WRSR)
The Write Status Register instruction (WRSR) allows the
user to write to the nonvolatile bits in the STATUS
register as shown in Table 3-2. The user is able to
select one of four levels of protection for the array by
writing to the appropriate bits in the STATUS register.
The array is divided up into four segments. The user
has the ability to write-protect none, one, two or all four
of the segments of the array. The partitioning is
controlled as shown in Table 3-3.
See Figure 3-6 for the WRSR timing sequence.
TABLE 3-3: ARRAY PROTECTION
BP1
BP0
0
0
0
1
1
0
1
1
Array Addresses
Write-Protected
None
Upper 1/4
Upper 1/2
All
Array Addresses
Unprotected
All
Lower 3/4
Lower 1/2
None
TABLE 3-4: ARRAY PROTECTED ADDRESS LOCATIONS
Density
Upper 1/4
Upper 1/2
1K
60h - 7Fh
40h - 7Fh
2K
C0h - FFh
80h - FFh
4K
180h - 1FFh
100h - 1FFh
All
00h - 7Fh
00h - FFh
000h - 1FFh
FIGURE 3-7:
WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)
CS
SCK
SI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Instruction
Data to STATUS Register
0 00 00 0 01 7 6 54 3 2 10
High-Impedance
SO
Note: An internal write cycle (TWC) is initiated on the rising edge of CS after a valid write STATUS register
sequence.
© 2009 Microchip Technology Inc.
Preliminary
DS22136B-page 13

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