29C516E データシートの表示（PDF） - Atmel Corporation

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29C516E

16–Bit Flow–Through EDAC Error Detection And Correction unit

Atmel Corporation 

29C516E

6. Syndrome Decoding

The syndrome decoder generates the error flags CERR

(Correctable ERRor) and NCERR (Non–Correctable

ERRor). If a correctable error occurs, the 29C516E

EDAC provides corrected data to the user. The inputs are

the 8 syndrome bits from the syndrome generator, the 16

data bits from the memory and the control signal N22.

N22 signal controls if 22 or 24 bits shall be decode from

the entire memory word.

Table 4: 6–Bit Syndrome Word to Bit–In–Error (N22=”1”)

Hex 0

1

2

3

Syndrome Bit SY[..]

5

0

0

1

1

4

0

1

0

1

Hex 3 2 1 0

0 0000

1 0001

2 0010

3 0011

4 0100

5 0101

6 0110

7 0111

8 1000

9 1001

A 1010

B 1011

C 1100

D 1101

E 1110

F 1111

N.E.D

MC0

MC1

D

MC2

D

D

M

MC3

D

D

MD4

D

MD0

MD1

D

MC4

D

D

MD8

D

MD5

MD9

D

D

M

MD10

D

MD2

D

D

M

MC5

D

D

MD6

D

MD12

M

D

D

MD13

MD14

D

MD3

D

D

M

D

MD7

MD11

D

MD15

D

D

M

M

D

D

M

D

M

M

D

Note :

N.E.D = No Errors Detected

MDx = Memory Data Bit–In–Error

MCx = Memory Check Bit–In–Error

D = Double–Bit–In–Error Detected

M = Multi–Bit–In–Error Detected

6

Rev. E (03 2007)

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