MRFIC2401R2 データシートの表示（PDF） - Motorola => Freescale

部品番号

コンポーネント説明

メーカー

MRFIC2401R2

2.4 GHz GaAs Downconverter

Motorola => Freescale 

DESIGN AND APPLICATIONS INFORMATION

The MRFIC2401 consists of a two–stage GaAs MESFET

low noise amplifier and a single ended MESFET mixer. The

LNA design conserves bias current through stacking of the

two FETs, thus reusing the current. The mixer consists of a

common gate stage driving a common source stage with the

IF output being the drain of the common source stage

shunted with 15 pF. The LNA output and mixer input have

been separated to allow the addition of an external image fil-

ter. Such a filter, usually ceramic, is useful in improving the

mixer noise figure and third order intercept performance. It

also provides LO rejection to reduce the amount of LO power

which may leak to the antenna. Alternatively, image trapping

can be implemented at the LNA input or output with discrete

or distributed components.

The design has been optimized for best performance from

2.4 to 2.5 GHz, but the device is usable with reduced perfor-

mance from 2.0 to 3.0 GHz as shown in the performance

curves. These curves were generated using the circuit

shown in Figure 1 and performance above 2.5 GHz can be

enhanced by rematching the LO input port. Matching circuit

details are shown for IFs of 110 MHz, 240 MHz, and

W 325 MHz matched to 50 and LO frequencies consistent

with an RF frequency of 2.45 GHz. Customized IF matching

can be accomplished by using the Equivalent IF Output cir-

cuit model shown in Figure 2. The best gain/noise figure

tradeoff match is shown in the LNA input impedance column

of Table 1. The LO input impedance is shown in the same

table. These numbers are derived from conjugate match

measurements of the applications circuit. The LNA output

W and mixer input are matched to 50 .

As with all RF circuitry, layout is important. Controlled

impedance lines should be used at all RF ports. RF bypas-

sing of power supply connections as close to the part as pos-

sible, while not always shown in the applications circuit, are

recommended. Additional power supply “stiffening” and digi-

tal transient bypassing should be accomplished with electro-

lytic or tantalum capacitors.

The device can be placed in a reduced current “standby”

mode by applying 5.0 Vdc to the STANDBY pin and remov-

ing the LO drive. Further current reduction “sleep” mode, is

enabled by applying 0 Vdc to VDD/SLEEP. This sleep mode

can also be used to disable the LNA under high signal level

conditions and give higher input intercept point if VDD is still

applied to the mixer.

EVALUATION BOARDS

Evaluation boards are available for RF Monolithic Inte-

grated Circuits by adding a “TF” suffix to the device type.

For a complete list of currently available boards and ones

in development for newly introduced poduct, please con-

tact your local Motorola Distributor or Sales Office.

MOTOROLA RF DEVICE DATA

MRFIC2401

7

Share Link: