1417K6S データシートの表示（PDF） - Agere -> LSI Corporation
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1417K6S Datasheet PDF : 14 Pages
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Data Sheet, Rev. 1
September 2001
NetLight 1417K6S 2.5 Gbits/s
1300 nm Laser Transceiver
Pin Information (continued)
Table 1. Transceiver Pin Descriptions
Pin
Number
MS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Symbol
MS
VPD
VEER
VEER
NIC
NIC
VEER
VCCR
SD
RD–
RD+
VCCT
VEET
TDIS
TD+
TD–
NIC
BMON–
BMON+
PMON–
PMON+
Name/Description
Receiver
Mounting Studs. The mounting studs are provided for transceiver
mechanical attachment to the circuit board. They may also provide an
optional connection of the transceiver to the equipment chassis
ground.
Photodetector Bias Input. This lead supplies bias for the PIN photo-
detector diode
Receiver Signal Ground.
Receiver Signal Ground.
No Internal Connection.
No Internal Connection.
Receiver Signal Ground.
Receiver Power Supply.
Signal Detect.
Normal operation: logic 1 output.
Fault condition: logic 0 output
Received DATA Out.
Received DATA Out.
Transmitter
Transmitter Power Supply.
Transmitter Signal Ground.
Transmitter Disable.
Transmitter DATA In. An internal 50 Ω termination is provided, con-
sisting of a 100 Ω resistor between the TD+ and TD– pins.
Transmitter DATA In. See TD+ pin for terminations.
No Internal Connection.
Laser Diode Bias Current Monitor, Negative End. The laser bias
current is accessible as a dc voltage by measuring the voltage devel-
oped across pins 17 and 18.
Laser Diode Bias Current Monitor, Positive End. Optional feature;
if not used, do not connect. See pin 17 description.
Laser Diode Optical Power Monitor, Negative End. Optional fea-
ture; if not used, do not connect. The back-facet diode monitor cur-
rent is accessible as a voltage proportional to the photocurrent
through a 200 Ω resistor between pins 19 and 20.
Laser Diode Optical Power Monitor, Positive End. Optional fea-
ture; if not used, do not connect. See pin 19 description.
Logic Family
NA
NA
NA
NA
NA
NA
NA
NA
LVTTL
CML
CML
NA
NA
LVTTL
LVPECL/CML
LVPECL/CML
NA
NA
NA
NA
NA
Agere Systems Inc.
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