2SJ517YYTL-E データシートの表示（PDF） - Renesas Electronics

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2SJ517YYTL-E

Silicon P Channel MOS FET

Renesas Electronics 

2SJ517

Static Drain to Source on State Resistance

vs. Temperature

0.5

Pulse Test

0.4

VGS = –2.5 V

0.3

ID = –2 A

–1 A

–0.5 A

0.2

0.1

–4 V

–0.5 A, –1 A, –2 A

0

–40 0

40 80 120 160

Case Temperature Tc (°C)

Body-Drain Diode Reverse

Recovery Time

500

200

100

50

20

10

5

–0.1 –0.2

di / dt = 50 A / µs

VGS = 0, Ta = 25°C

–0.5 –1 –2 –5 –20

Reverse Drain Current IDR (A)

Dynamic Input Characteristics

0

0

VDD = –5 V

–10 V

–10

–4

VDS

–20

–8

VDD = –5 V

–30

–10 V

–12

VGS

–40

–16

–50

0

4

8

12 16

Gate Charge Qg (nc)

–20

20

Forward Transfer Admittance vs.

Drain Current

10

5 Tc = –25°C

2

25°C

1

75°C

0.5

0.2

0.1

–0.1 –0.2

–0.5 –1

VDS = –10 V

Pulse Test

–2 –5 –10

Drain Current ID (A)

Typical Capacitance vs.

Drain to Source Voltage

1000

500

Ciss

200

Coss

100

Crss

50

20

VGS = 0

f = 1 MHz

10

0

–4

–8 –12 –16 –20

Drain to Source Voltage VDS (V)

Switching Characteristics

500

200

td(off)

100

tf

50

tr

20

td(on)

10

5

–0.1 –0.2

VGS = –4 V, VDD = –10 V

duty ≤ 1 %

–0.5 –1 –2 –5 –10

Drain Current ID (A)

Rev.4.00 Sep 07, 2005 page 4 of 6

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